Adaptive voting computer system

Claim 2

An adaptive control apparatus for a plurality of self-testing data processing computer modules whereby operational computer modules of said plurality of interconnectable with a data bus and failed computer modules of said plurality are excluded from communication with the data bus in accordance with the operational/failure status of the computer modules, said apparatus comprising: a control means for each computer module for deriving the operational/failure status of each of said computer modules, determining a desired interconnection mode for said computer modules and generating an electrical signal representative of said desired interconnection mode, each said control means for each computer module including P matrix logic means electrically interconnected with said computer modules for receiving input data signals from each said computer module and for deriving signals indicative of the operational/failure status of each said computer module from input data signals, P matrix storage means for storing the signals indicative of the operational/failure status of each of said computer modules, R memory matrix means for storing signals representing desirable interconnection modes for said computer modules, R matrix logic means coupled to said P matrix storage means and said R matrix means and responsive to said signals stored therein to derive signals indicative of a desired interconnection mode for said computer modules; an adaptive voter comparator switch means coupled to said R matrix logic means and to each said computer module and operative in response to the input signals from said computer modules and the signals derived from said R matrix logic means which are indicative of the desired interconnection mode for said computer modules to connect selected computer modules in the desired interconnecting mode.

Claim 3

An adaptive control apparatus for a plurality of self-testing data processing computer modules whereby operational computer modules of said plurality are interconnectable with a data bus and failed computer modules of said plurality are excluded from communication with the data bus in accordance with the operational/failure status of the computer modules, said apparatus comprising: a control means for each computer module for deriving the operational/failure status of each of said computer modules, determining a desired interconnection mode for said computer modules and generating an electrical signal representative of said desired interconnection mode, each said control means for each computer module including P matrix logic means electrically interconnected with said computer modules for receiving input data signals from each said computer module and by adaptive majority voting deriving signals indicative of the operational/failure status of each said computer module from said input data signals, P matrix storage means for storing the signals indicative of the operational/failure status of each of said computer modules, R memory matrix means for storing signals representing desirable interconnection modes for said computer modules, R matrix logic means coupled to said P matrix storage means and said R matrix means and responsive to said signals stored therein to derive signals by an adaptive majority logic decision to indicate a desired interconnection mode for said computer modules; an adaptive voter comparator switch means coupled to said R matrix logic means and to each said computer module and operative in response to the input signals and said computer modules and the signals derived from said R matrix logic means to connect selected computer modules to the data bus in the desired interconnecting mode by adaptive majority voting in accordance with their operational/failure status.

Claim 4

An adaptive control apparatus for a plurality of self-testing data processing computer modules whereby operational computer modules of said plurality are interconnectable with a data bus and failed computer modules of said plurality are excluded from communication with the data bus in accordance with the operational/failure status of the computer modules, said apparatus comprising: a control means for each computer module for deriving the operational/failure status of each of said computer modules, determining a desired interconnection mode for said computer modules and generating an electrical signal representative of said desired interconnection mode, each said control means for each computer module including P matrix logic means electrically interconnected with said computer modules for receiving input data signals from each said computer module and by adaptive majority voting deriving signals indicative of the operational/failure status of each said computer module from said input data signals, P matrix storage means for storing the signals indicative of the operational/failure status of each of said computer modules, R memory matrix means for storing signals representing desirable interconnection modes for said computer modules, R matrix logic means coupled to said P matrix storage means and said R matrix means and responsive to said signals stored therein to derive signals by an adaptive majority logic decision to indicate a desired interconnection mode for said computer modules; an adaptive voter comparator switch means coupled to said R matrix logic means and to each said computer module and operative in response to the input signals and said computer modules and the signals derived from said R matrix logic means to connect selected computer modules to the data bus in the desired interconnecting mode by adaptive majority voting in accordance with their operational/failure status.

Claim 5

An adaptive control apparatus as recited in claim 2, further including input-output processor means with each computer module and operably coupled with said data bus for effecting intercommunication and control operation between said computer modules and said control means for each computer module.

Claim 6

An adaptive control apparatus as recited in claim 2, further including means coupled to said R matrix logic means and to each said computer module for inspecting the input data signals to said adaptive voter comparator switch means to detect errors therein and effectively remove the erroneous signals from the adaptive majority voting process of said adaptive voter comparator switch means.

Claim 7

An adaptive control apparatus as recited in claim 2 wherein each said computer module includes self-test equipment and is responsive to self-test equipment for indicating a failure in the operation of such computer module and said P matrix logic means derives said signals indicative of the operational/failure status of each computer module by indicating a failure test for a particular computer module when the particular computer module is indicated as failed by said self-test equipment or whenever a majority of the computer modules currently voting indicates such particular computer module is in a failure status,

Claim 8

An adaptive control apparatus as recited in claim 3 wherein said adaptive control apparatus controls four data processing computer modules and said R memory matrix means stores signals representing interconnection modes for said computer modules wherein the computer modules are operative in a majority mode thereby performing a redundancy reduction of either four to one or three to one.

Claim 9

An adaptive control apparatus as recited in claim 3 wherein said adaptive control apparatus controls four data processing computer modules and said R memory matrix means stores signals representing interconnection modes for said computer modules wherein the computer modules are operative in a comparison mode thereby performing a redundancy reduction of two to one.