Data transmitting systems

Claim 3

The method as recited in claim 1, wherein: providing a source of data signals comprises providing data signals having either a first or a second state, and modulating alternate full cycles of the reference signal comprises modulating the reference signal if the data signal is in the second state and not modulating the reference signal if the data signal is in the first state.

Claim 4

The method as recited in claim 1, further comprising: separating the reference signal into first and second components comprising its data modulated and non-data modulated cycles, respectively, and comparing the cycles of the first and second components to obtain a representation of the data signal.

Claim 5

The method as recited in claim 3, wherein comparing the cycles of the components of the reference signal comprises: rectifying both of the components; phase-shifting one of the components so that the cycles of that component occur simultaneously with the cycles of the other component, and comparing the cycles of the phase-shifted and the non-phase-shifted components to obtain a representation of the data signal.

Claim 6

The method as recited in claim 4, wherein: providing a source of data signals comprises providing a binary data signal having either a first or a second state; modulating alternate cycles of the reference signal comprises modulating the reference signal if the data signal is in the second state and not modulating the reference signal if the data signal is in the first state, and wherein comparing the cycles of the phase-shifted and the non-phase shifted components comprises: inverting one of the components; integrating both of the components, and averaging the cycles of the integrated components to obtain a binary representation of the data signal.

Claim 9

The method according to claim 6, wherein the decoding step comprises: separating the modulated reference signal into first and second components comprising its data modulated and its non-data modulated cycles, respectively; applying the first component to one conductor of first and second conductors and the second component to the other conductor of the firSt and second conductors; sensing whether the first component is being applied to the first or the second conductor and, if the first component is being applied to the second conductor, reapplying the first and the second components to the two conductors so that the first component is applied to the first conductor, and comparing the cycles of the first component with the cycles of the second component to obtain a representation of the data signal.

Claim 10

The method according to claim 7, wherein the comparing step comprises: rectifying the cycles of the components on the first and the second conductors; phase-shifting one of the rectified components so that the cycles of the first and the second components occur simultaneously; inverting one of the rectified components; integrating both of the components, and averaging the values of the cycles of the integrated components to obtain a representation of the binary data signal.

Claim 11

A circuit for transmitting data, which comprises: means for providing an alternating current reference signal at a first frequency; a source of data signals for providing data at a second frequency, the second frequency being one-half the frequency of the first frequency, and means for modulating alternate full cycles of the reference signal in accordance with the value of the data signal.

Claim 12

A circuit for transmitting data, which comprises: means for providing an alternating current reference signal at a first frequency; a source of data signals for providing data at a second frequency, the second frequency being one-half the frequency of the first frequency, and means for modulating alternate full cycles of the reference signal in accordance with the value of the data signal.

Claim 13

The circuit as recited in claim 9, further comprising means for separating the reference signal into first and second components comprising its data modulated cycles and its non-data modulated cycles, respectively; means for rectifying both of the components; means for phase-shifting one of the components so that the cycles of both of the components occur simultaneously; an inverter, for inverting one of the components; means for integrating the components, and means for comparing the components to obtain a representation of the binary data signal.

Claim 14

A circuit for encoding and decoding a binary data signal to be sent from a transmitting location to a receiving location, which comprises: a source of constant amplitude sinusoidal reference signals at a first frequency; a source of binary data signals at a second frequency, the second frequency being one-half the frequency of the first frequency the value of the binary data signals being governed by intelligence to be transmitted; means for modulating alternate cycles of the reference signal in accordance with the value of the binary data signal to generate a transmission signal having the same frequency as the reference signal, the modulating means operating so that data bits of a first type do not amplitude modulate a corresponding cycle of the reference signal and so that data bits of a second type do; means for transmitting the transmission signal to a receiving location, and means, at the receiving location, for generating a representation of the data signal in response to the transmission signal.

Claim 15

A circuit for encoding and decoding a binary data signal to be sent from a transmitting location to a receiving location, which comprises: a source of constant amplitude sinusoidal reference signals at a first frequency; a source of binary data signals at a second frequency, the second frequency being one-half the frequency of the first frequency the value of the binary data signals being governed by intelligence to be transmitted; means for modulating alternate cycles of the reference signal in accordance with the value of the binary data signal to generate a transmission signal having the same frequency as the reference signal, the modulating means operating so that data bits of a first type do not amplitude modulate a corresponding cycle of the reference signal and so that data bits of a second type do; means for transmitting the transmission signal to a receiving location, and means, at the receiving location, for generating a representation of the data signal in response to the transmission signal.

Claim 16

A circuit as recited in claim 11, wherein the generating means comprises: first and second conductors; means for applying the data modulated cycles of the transmission signal to one of the conductors and the non-data modulated cycles of the transmission signal to the other conductor; means for sensing whether the data modulated cycles of the transmission signal are being applied to the first or the second conductor; means, responsive to the data modulated cycles being applied to the second conductor, to reapply the cycles, so that the data modulated cycles are applied as a first signal to the first conductor and so that the non-data modulated cycles are applied as a second signal to the second conductor, and means for comparing the cycles of the first signal with the cycles of the second signal to obtain a representation of the data signal.

Claim 17

A circuit as recited in claim 12, wherein the comparing means comprises: first and second rectifiers, for rectifying the fIrst and second signals, respectively; means for phase-shifting one of the signals, so that the cycles of the first and the second signals occur simultaneously; an inverter for inverting one of the signals; first and second integrators, for integrating the first and second signals, respectively, and means for averaging the values of the first and second integrated signals to obtain the representation of the data signal.