US3566033A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Frequency shift signal transmission systems using half-cycles of frequency shift oscillator
Assignee: Serck Controls Ltd
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Filing: 1968-05-08
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Granted: 1971-02-23
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Expires: 1988-05-08
Abstract
Abstract In data transmission system for the transmission of binary coded date a mark is represented by only one-half a cycle of one frequency and a space by only one-half a cycle of another frequency. The receiver is arranged to reorganize the respective frequency from examining each half-cycle.
Inventors
- 👤 Robert Eric Young
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-25 01:56
CPC Classifications
H; H04; H04L; H04L27/00; H04L27/10
Claims Analysis
Total Claims: 8
Claim 1
Independent Claim
124 words
A data transmission system for the asynchronous transmission of binary coded data from a data source, comprising means for determining whether each bit of data from the data source is a mark or a space, a frequency shift oscillator, means for smoothly changing the frequency of said oscillator between two predetermined frequencies to provide an output wherein each mark of data is represented by a half-cycle of one of said frequencies and each space of data is represented by a half-cycle of the other of said frequencies, and means for storing and releasing the data to the frequency change means in timed relationship so that the transition from one said frequency to the other said frequency taking place at substantially the zero crossover point.
Claim 2
Dependent Claim
124 words
A data transmission system for the asynchronous transmission of binary coded data from a data source, comprising means for determining whether each bit of data from the data source is a mark or a space, a frequency shift oscillator, means for smoothly changing the frequency of said oscillator between two predetermined frequencies to provide an output wherein each mark of data is represented by a half-cycle of one of said frequencies and each space of data is represented by a half-cycle of the other of said frequencies, and means for storing and releasing the data to the frequency change means in timed relationship so that the transition from one said frequency to the other said frequency taking place at substantially the zero crossover point.
Claim 3
Dependent Claim
83 words
A data transmission system as claimed in claim 1, wherein at the receiving end there are provided means for rapid sampling according to the amplitude of the incoming waveform of the oscillator output, store means for storing previously obtained rapid sampling amplitude values of one or both half-cycles of the two frequencies of the oscillator and means for comparing the samples of the incoming waveform against the store samples to determine from which said frequency each half-cycle of the incoming waveform was derived.
Claim 4
Dependent Claim
93 words
A system as claimed in claim 2, wherein means is provided to convert the samples of the incoming waveform into digital form and feed said digital form to a shift register matrix and means is provided for reading the digital form together with the store sample in digital form to a comparison device to determine whether the incoming digital form corresponds or not with the stored digital form. A system claim 2 wherein where comparison is made against only one of the predetermined forms, this form is that corresponding to the higher frequency.
Claim 5
Dependent Claim
27 words
A system as claimed in claim 3 wherein the stored samples of digital form are transferred to a shift matrix before being fed to the comparison device.
Claim 6
Dependent Claim
29 words
A system as claimed in claim 2 wherein the samples of the previous incoming signal are passed to the store to become the store samples during the next comparison.
Claim 7
Dependent Claim
55 words
A system as claimed in claim 1 wherein the means for determining whether each bit is a mark or a space comprises a gate and an inverter-gate combination to both of which the bits are fed, the gates being controlled by common gating pulses timed to occur at approximately the center of the bit periOd.
Claim 8
Dependent Claim
41 words
A system as claimed in claim 1 wherein the frequency shift oscillator runs at a frequency which is an integer of the signalling frequency and the oscillator frequency is divided by this same integer to enable timing pulses to be obtained.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1974-02-22 | 1974-08-24 | 1975-02-23 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1978-02-22 | 1978-08-24 | 1979-02-23 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1982-02-22 | 1982-08-24 | 1983-02-23 | $7700.00 | Window Closed / Lapsed |