Control logic circuit for analog charge-transfer memory systems

Claim 1

A logic circuit for controlling the operation of an analog memory system having the memory unit thereof fabricated from charge-transfer devices and comprising a clock control logic circuit comprising a clock generator for generating a continuous rectangular waveform voltage clock pulse signal at a particular repetition rate, first means connected to an output of said clock generator for providing a plurality of continuous rectangular first waveform voltage signals each having a repetition rate less than the repetition rate of the clock pulse signal, second means connected to an output of said first means for selecting one of the plurality of continous rectangular first waveform signals to thereby provide a programmable repetition rate rectangular second waveform signal which determines the periods of read-in and recirculation cycles of operation of the analog memory system, and third means connected to an output of said second means and to an output of said clock generator for determining the number of clock pulses supplied from said clock generator to chargetransfer devices in a memory unit of the analog memory system to cause propagation of a sampled analog information signal through the memory unit for each read-in and recirculation cycle, a recirculation control logic circuit comprising fourth means connected to an output of said second means for providing a plurality of continuous rectangular third waveform voltage signals each having a repetition rate less than the repetition rate of the rectangular second waveform signal, and fifth means connected to outputs of said fourth means for selecting one of the plurlaity of continuous rectangular third waveform signals to thereby provide a programmable repetition rate rectangular fourth waveform signal which determines the number of recirculation cycles between successive read-in cycles, and a mode selector control logic circuit comprising a first switch device having an input connected to an input terminal of the analog memory system to which is applied the analog information signal to be sampled, a second switch device having an input connected to an output of a feedback circuIt connected around the memory unit, outputs of said first and second switch devices connected to an input of the memory unit, said first switch device having a control input connected to an output of said fifth means, and an inverter connected between the output of said fifth means and a control input of said second switch device for inverting the state of the rectangular fourth waveform signal applied thereto relative to the corresponding signal applied to the control input of said first switch device, the states of the noninverted and inverted fourth waveforms applied respectively to the control inputs of said first and second switch devices determining which switch device is in a closed state while the other is in an open state so that said first and second switch devices respectively connect the memory unit in a read-in mode and recirculate mode, the clock pulses controlled in number by said third means being supplied as a burst thereof for a first portion of each read-in and recirculate period, the sampled analog information being stored in the memory unit for a second portion of each read-in and recirculate period in the absence of the clock pulses, the information being stored in the memory unit for a second portion of each read-in recirculate cycle in the absence of the clock pulses, the storage and recirculation of the analog information permitting a nondestructive read-out capability for the memory system.