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US3769569A Expired / Lapsed US ⏱️ 0.0 years remaining

Contactless inverter circuit particularly to supply polyphase a-c motors from a d-c source

Assignee: Ebm Papst St Georgen GmbH and Co KG
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Filing: 1972-05-19
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Granted: 1973-10-30
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Expires: 1992-05-19
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Abstract

Abstract A clock supplies clock pulses at a predetermined frequency. A group of controlled switching circuits are interconnected between the d-c supply source and the load, typically the windings of a polyphase a-c asynchronous motor. The controllable semiconductor switching circuits are controlled from the clock source to be switched between ON and OFF state to selectively, sequentially energize the windings of the motor. To provide better approach of the pulses to sinusoidal wave shape, a delay circuit is connected between the controlled semiconductor switching circuit to delay the trailing flanks of the pulses passed by the switching circuit upon change from ON to OFF of the semiconductor switches.

Inventors

  • 👤 B Doemen

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-05 02:52
CPC Classifications
H; H02; H02M; H02M7/00; H02M7/42; H02M7/44; H02M7/48; H02M7/53; H02M7/537; H02P; H02P23/00; H02P23/28

Claims Analysis

Total Claims: 18
Claim 1
Independent Claim 120 words
Contactless inverter circuit to obtain a-c power from a d-c source for connection to a polyphase motor (13) forming a load comprising a clock source (12) providing clock frequency signals; a plurality of controllable semiconductor switching circuits (28, 41, 42, 43) connected between the d-c supply and the respective phases of the motor windings, said controllable semiconductor switching circuit being controllable to switch between ON and OFF state under control of the clock frequency signal; and a delay circuit (37) connected in each of the controllable semiconductor switching circuits, and being so dimensioned that the trailing flanks of the pulses (23'') provide for overlap of sequential phases of the motor to provide a substantially uniform rotary field in the motor.
Claim 2
Dependent Claim 120 words
Contactless inverter circuit to obtain a-c power from a d-c source for connection to a polyphase motor (13) forming a load comprising a clock source (12) providing clock frequency signals; a plurality of controllable semiconductor switching circuits (28, 41, 42, 43) connected between the d-c supply and the respective phases of the motor windings, said controllable semiconductor switching circuit being controllable to switch between ON and OFF state under control of the clock frequency signal; and a delay circuit (37) connected in each of the controllable semiconductor switching circuits, and being so dimensioned that the trailing flanks of the pulses (23'') provide for overlap of sequential phases of the motor to provide a substantially uniform rotary field in the motor.
Claim 3
Dependent Claim 38 words
Circuit according to claim 1, wherein the controllable semiconductor switching circuits (28) comprise, each, a power transistor (29) and the delAy circuits comprise, each, a capacitor (37) connected between the input and the output of said power transistor.
Claim 4
Dependent Claim 51 words
Circuit according to claim 2, wherein the controllable semiconductor switching circuits further comprise, each, an amplifying transistor (30) having its output connected to the input of the power transistor; and the capacitor (37) is connected between the output of the power transistor (29) and the input of the amplifying transistor (30).
Claim 5
Dependent Claim 45 words
Circuit according to claim 1, further comprising a logic circuit (16) connected to said clock source, said logic circuit including frequency dividers (15, 18) and a decoding circuit (22) providing sequentially staggered output signals (23'', 24'', 25'', 26'') to control the controllable semiconductor switching circuits.
Claim 6
Dependent Claim 55 words
Circuit according to claim 4, wherein the motor is a four-phase motor, a pair of frequency divider stages (15, 18) being provided, said decoding circuit being connected and controlled by the frequency divider stages to provide, for each cycle of the a-c power, four control pulses (23'', 24'', 25'', 26''), in equally spaced temporal sequence.
Claim 7
Dependent Claim 40 words
Circuit according to claim 1, wherein the motor includes an inductive winding; and circuit means controlling the ON duration of the controllable semiconductor switching circuit in dependence on the level of the inductive voltage peaks occurring at a motor winding.
Claim 8
Dependent Claim 37 words
Circuit according to claim 6, including threshold sensing means sensing inductive peaks at any one of the motor windings and controlling the ON state of the semiconductor switching circuit if the inductive peaks exceed a predetermined threshold.
Claim 9
Dependent Claim 45 words
Circuit according to claim 6, wherein OR-gate (63 - 66) means being connected to the windings and having its output connected to control said semiconductor switching circuits in a direction to decrease the ON time of the semiconductor switching circuits connected to the motor windings.
Claim 10
Dependent Claim 40 words
Circuit according to claim 8, further comprising logic circuit means interconnected between said clock source and the controllable semiconductor switching circuits, said logic circuit means including conjunctive elements (100, 101, 102, 103), the OR-gate being interconnected with said conjunctive elements.
Claim 11
Dependent Claim 25 words
Circuit according to claim 9, wherein the output of the OR-gate is connected to at least one input of each one of said conjunctive elements.
Claim 12
Dependent Claim 27 words
Circuit according to claim 9, wherein the conjunctive elements are NAND-gates, at least one input of said NAND-gates having a signal applied thereto derived from said OR-gate.
Claim 13
Dependent Claim 23 words
Circuit according to claim 9, including a level setting network (69, 71) interconnected between the OR-gate and the inputs to the conjunctive gates.
Claim 14
Dependent Claim 30 words
Circuit according to claim 12, wherein the level setting network (69, 71) provides outputs at levels which are effective to reach the logical signal level of said logic network (16).
Claim 15
Dependent Claim 127 words
Polyphase a-c motor and supply circuit to operate the motor from a d-c source comprising semiconductor switching circuit means (28, 40, 41, 42) interconnecting the phase windings of the motor and the d-c source of supply; means providing essentially square wave pulses connected to and controlling the semiconductor switching circuit means to cyclically control the conduction thereof and thus, cyclically, connect the phase windings of the motor to the source; means sensing voltage peaks in excess of a predetermined threshold level across the motor phase windings and obtaining an excess level signal representative of the time duration during which said excess level persists; and means controlled by said excess level signal inhibiting application of pulses to said semiconductor switching circuit means while the excess level signal persists.
Claim 16
Dependent Claim 127 words
Polyphase a-c motor and supply circuit to operate the motor from a d-c source comprising semiconductor switching circuit means (28, 40, 41, 42) interconnecting the phase windings of the motor and the d-c source of supply; means providing essentially square wave pulses connected to and controlling the semiconductor switching circuit means to cyclically control the conduction thereof and thus, cyclically, connect the phase windings of the motor to the source; means sensing voltage peaks in excess of a predetermined threshold level across the motor phase windings and obtaining an excess level signal representative of the time duration during which said excess level persists; and means controlled by said excess level signal inhibiting application of pulses to said semiconductor switching circuit means while the excess level signal persists.
Claim 17
Dependent Claim 36 words
Motor and circuit combination according to claim 14 further comprising delay circuit means connected to said switching circuit means and extending the conduction Of said switching circuit means after termination of the essentially square wave pulse.
Claim 18
Dependent Claim 50 words
Motor and circuit combination according to claim 14, wherein the switching circuit means comprises transistors and delay circuit means including an interconnection from the output circuit of the transistor to the input circuit thereof to provide gradually declining conduction of the transistor after termination of the essentially square wave pulses.

References Cited (Backward Citations)

US3095534A Cited
US3309602A Cited
US3440451A Cited
US3350661A Cited
US3594623A Cited
US3652922A Cited
US3705342A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1976-10-29 1977-04-30 1977-10-30 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1980-10-29 1981-04-30 1981-10-30 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1984-10-29 1985-04-30 1985-10-30 $7700.00 Window Closed / Lapsed

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