Patent US3766545A successfully refreshed from Google Patents.
US3766545A
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Digital phase detector
Assignee: Individual
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Filing: 1972-01-25
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Granted: 1973-10-16
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Expires: 1992-01-25
Abstract
Abstract Disclosed herein is an improved apparatus for converting an analog signal of unknown phase into a binary-coded digital form. It includes a plurality of phase detectors which compare the analog signal with their associated reference signals having different phases from each other and provide output voltages corresponding to the phase differences. The outputs of the phase detectors are supplied to their associated groups of threshold detectors for comparison with different predetermined reference levels. A logic circuitry is responsive to the outputs of the threshold detectors to generate the binary-coded digital signal. When employed in a radar system, this invention enables the detection of digital video signals directly from the received signals at radio or intermediate frequency without translating them into analog video signals.
Inventors
- 👤 M Hikosaka
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-03 10:11
CPC Classifications
H; H03; H03M; H03M1/00; G; G01; G01R; G01R25/00; G01S; G01S7/00; G01S7/02; G01S7/28; G01S7/285; G01S7/288; H03M1/06; H03M1/08
Claims Analysis
Total Claims: 3
Claim 1
Independent Claim
237 words
Apparatus for converting an analog signal of unknown phase into a binary-coded digital form, comprising: means for generating said analog signal of unknown phase; means for generating a first reference signal; means responsive to said first reference signal for generating a second reference signal which is 120* out of phase with said first reference signal; means responsive to said first reference signal for generating a third reference signal which is 240* out of phase with said first reference signal; first, second and third phase detectors responsive to said analog signal and to said first, second and third reference signals, respectively, for detecting the phase difference therebetween; first, second and third threshold detectors having a common input connected to said first phase detector; fourth, fifth and sixth threshold detectors having a common input connected to said second phase detector; seventh, eighth and ninth threshold detectors having a common input connected to said third phase detector; means for supplying a first predetermined reference level to said first, fourth and seventh threshold detectors and for supplying a second predetermined reference level to said second, fifth and eighth threshold detectors and for supplying a third predetermined reference level to said third, sixth and ninth threshold detectors; nine inverters each connected to one of said nine threshold detectors; and means responsive to said first to ninth threshold detectors for providing a binary-coded digital signal representative of the phase of said analog signal.
Claim 2
Dependent Claim
237 words
Apparatus for converting an analog signal of unknown phase into a binary-coded digital form, comprising: means for generating said analog signal of unknown phase; means for generating a first reference signal; means responsive to said first reference signal for generating a second reference signal which is 120* out of phase with said first reference signal; means responsive to said first reference signal for generating a third reference signal which is 240* out of phase with said first reference signal; first, second and third phase detectors responsive to said analog signal and to said first, second and third reference signals, respectively, for detecting the phase difference therebetween; first, second and third threshold detectors having a common input connected to said first phase detector; fourth, fifth and sixth threshold detectors having a common input connected to said second phase detector; seventh, eighth and ninth threshold detectors having a common input connected to said third phase detector; means for supplying a first predetermined reference level to said first, fourth and seventh threshold detectors and for supplying a second predetermined reference level to said second, fifth and eighth threshold detectors and for supplying a third predetermined reference level to said third, sixth and ninth threshold detectors; nine inverters each connected to one of said nine threshold detectors; and means responsive to said first to ninth threshold detectors for providing a binary-coded digital signal representative of the phase of said analog signal.
Claim 3
Dependent Claim
52 words
The apparatus according to claim 1, further comprising: means responsive to the outputs of said first, fourth and seventh threshold detectors and to the outputs of said inverters connected to said third, sixth and ninth threshold detectors for determining the presence of said analog signal. means for supplying a first predetermined reference
References Cited (Backward Citations)
US3538345A
Cited
US3548321A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1976-10-15 | 1977-04-16 | 1977-10-16 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1980-10-15 | 1981-04-16 | 1981-10-16 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1984-10-15 | 1985-04-16 | 1985-10-16 | $7700.00 | Window Closed / Lapsed |