US3766446A
Expired / Lapsed
US
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Integrated circuits comprising lateral transistors and process for fabrication thereof
Assignee: National Institute of Advanced Industrial Science and Technology
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Filing: 1970-11-18
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Granted: 1973-10-16
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Expires: 1990-11-18
Abstract
Abstract A ''''lateral'''' transistor for use in integrated circuits may have its base region formed by a technique of ''''ion implantation'''' with or without a step of impurity diffusion or, alternatively, by two steps of impurity diffusion including the formation of the so-called ''''buried'''' layer. In either case an emitter region is double-diffused into the base region simultaneously with collector diffusion, in such a manner that the base width of the lateral transistor is defined by a difference between the lengths of the double diffusion. The aforesaid ion implantation and buried layer techniques are utilized in the fabrication of integrated circuits incorporating such lateral transistors, in which base regions and isolation regions are formed at the same time. In other integrated circuits also disclosed herein, the lateral transistors together with or without field-effect transistors are isolated by means of substrate having higher resistivity than the base regions of the transistors.
Inventors
- 👤 T Tarui
- 👤 Y Komiya
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-24 06:43
CPC Classifications
H; H10; H10D; H10D84/00; H10D84/40; H10D84/401; H10D84/403; H10D84/409; H10D99/00; H10P; H10P95/00; Y; Y10; Y10S; Y10S148/00; Y10S148/037; Y10S148/053; Y10S148/085; Y10S148/096; Y10S148/106; Y10S148/136; Y10S148/145; Y10S148/151
Claims Analysis
Total Claims: 9
Claim 1
Independent Claim
206 words
In an integrated circuit, at least one lateral transistor comprising a substrate having a main surface, a base region in said substrate defined by impurities of one conductivity type distributed by means of ion-implantation in such manner that their peak concentration is at a selected depth from the main surface of said substrate, an emitter region defined in said base region by impurities of another conductivity type, the main active base width of said base region being defined by a difference between the lengths of the diffusion of said impurities of one conductivity type and the diffusion of said impurities of another conductivity type, the base impurity concentration near an emitter junction being substantially higher in a portion under said emitter region than in an active base region beside the lateral part of said emitter region, said base region being in direct contact with a portion of the substrate having a higher resistivity of the same conductivity type as said base region, and a collector region defined in said substrate by impurities of the same conductivity type as said emitter region being disposed laterally of said base region and being separated from saId base region by a portion of said substrate forming a collector depletion region.
Claim 2
Dependent Claim
206 words
In an integrated circuit, at least one lateral transistor comprising a substrate having a main surface, a base region in said substrate defined by impurities of one conductivity type distributed by means of ion-implantation in such manner that their peak concentration is at a selected depth from the main surface of said substrate, an emitter region defined in said base region by impurities of another conductivity type, the main active base width of said base region being defined by a difference between the lengths of the diffusion of said impurities of one conductivity type and the diffusion of said impurities of another conductivity type, the base impurity concentration near an emitter junction being substantially higher in a portion under said emitter region than in an active base region beside the lateral part of said emitter region, said base region being in direct contact with a portion of the substrate having a higher resistivity of the same conductivity type as said base region, and a collector region defined in said substrate by impurities of the same conductivity type as said emitter region being disposed laterally of said base region and being separated from saId base region by a portion of said substrate forming a collector depletion region.
Claim 3
Dependent Claim
27 words
An integrated circuit according to claim 1, in which said substrate is pi -type, the base region is p-type and the emitter and collector regions are n-type.
Claim 4
Dependent Claim
79 words
An integrated circuit according to claim 1, comprising a plurality of lateral transistors whose base regions are of one and the same conductivity type and in direct contact with a common substrate having higher resistivity of the same conductivity type as said base regions, said lateral transistors being isolated from one another by said high resistivity substrate, said transistors having collector junctions in direct contact with said high resistivity substrate having the same conductivity type as said base regions.
Claim 5
Dependent Claim
110 words
In an integrated circuit as claimed in claim 1, a plurality of insulated gate field-effect transistors, comprising a substrate, base regions of said lateral transistor and of said field-effect transistors being of one and the same conductivity type and being disposed in direct contact with the substrate, said substrate having the same conductivity type as said base portions of said lateral transistor and said field-effect transistors, said substrate having a higher resistivity than the last-mentioned base portions, and said lateral transistor having a collector junction and said field effect transistors having drain junctions in direct contact with said high resistance substrate having the same conductivity type as said base regions.
Claim 6
Dependent Claim
14 words
An integrated circuit according to claim 4, in which said substrate is pi -type.
Claim 7
Dependent Claim
229 words
In an integrated circuit, at least one lateral transistor comprising a substrate, an epitaxial layer overlying said substrate, a base region partly in said substrate and partly in said epitaxial layer and defined by impurities of one conductivity type distributed by means of ion-implantation in such manner that their peak concentration is at a selected depth from the surface of said epitaxial layer, an emitter region defined in said base region by the diffusion therein of impurities of another conductivity type, the main active base width being defined by a difference between the lengths of the diffusion of said impurities of one conductivity type and the diffusion of impurities of said other conductivity type, the base impurity concentration near an emitter junction being substantially higher in a portion under said emitter region than in an active base region beside the lateral part of said emitter region, a collector region of the same conductivity type as said emitter region disposed laterally of said emitter region, a buried layer underlying said base region and having a high impurity concentration and the same conductivity type as said collector region, a portion of said base region which underlies said emitter region and which is high in base impurity concentration and low in resistivity being isolated from the substrate by said buried layer, said substrate having the same conductivity type as said base region.
Claim 8
Dependent Claim
229 words
In an integrated circuit, at least one lateral transistor comprising a substrate, an epitaxial layer overlying said substrate, a base region partly in said substrate and partly in said epitaxial layer and defined by impurities of one conductivity type distributed by means of ion-implantation in such manner that their peak concentration is at a selected depth from the surface of said epitaxial layer, an emitter region defined in said base region by the diffusion therein of impurities of another conductivity type, the main active base width being defined by a difference between the lengths of the diffusion of said impurities of one conductivity type and the diffusion of impurities of said other conductivity type, the base impurity concentration near an emitter junction being substantially higher in a portion under said emitter region than in an active base region beside the lateral part of said emitter region, a collector region of the same conductivity type as said emitter region disposed laterally of said emitter region, a buried layer underlying said base region and having a high impurity concentration and the same conductivity type as said collector region, a portion of said base region which underlies said emitter region and which is high in base impurity concentration and low in resistivity being isolated from the substrate by said buried layer, said substrate having the same conductivity type as said base region.
Claim 9
Dependent Claim
62 words
An integrated circuit according to claim 6, in which said impurities of one conductivity type implanted and diffused into said epitaxial layer so as to define the base region and in isolation regions of said at least one lateral transistor have substantially the same impurity distribution in said base region and said isolation regions in a direction perpendicular to said epitaxial layer.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1976-10-15 | 1977-04-16 | 1977-10-16 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1980-10-15 | 1981-04-16 | 1981-10-16 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1984-10-15 | 1985-04-16 | 1985-10-16 | $7700.00 | Window Closed / Lapsed |