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US3764913A Expired / Lapsed US ⏱️ 0.0 years remaining

Digital synchronous fm-modem

Assignee: US Philips Corp
•
Filing: 1972-02-08
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Granted: 1973-10-09
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Expires: 1992-02-08
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Abstract

Abstract A digital synchronous modem for the synchronous FM transmission of binary coded data signal through cables and internal telephone lines where both a modulator in a transmitter section and a demodulator in a receiver section are controlled by a main generator providing a fundamental frequency that is divided down to a clock frequency by a stepwise controllable digital divider. The divider synchronizes the receiver to the rythmn of received data signals by altering its division ratio in response to a control signal derived by comparing the zero crossings of the received data signal to the clock pulses.

Inventors

  • 👤 G Ochel
  • 👤 J Schroder

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-01 04:34
CPC Classifications
H; H04; H04L; H04L27/00; H04L27/10

Claims Analysis

Total Claims: 10
Claim 1
Independent Claim 238 words
A digital synchronous modem for the synchronous FM transmission of binary coded data signals through cables and internal telephone lines, comprising a transmitter section; and a receiver section; the transmitter section comprising a modulator for transmitting the binary coded data signals, a main generator for generating a fundamental frequency, a stepwise controlled frequency divider connected to the main generator for providing clock pulses, means connecting the output of the stepwise controlled frequency divider to the modulator as a control signal, the modulator comprising interconnected logic gates and bistable triggers; the receiver section comprising a demodulator for receiving the binary coded data signals, means connecting the output of the stepwise controlled frequency divider to the demodulator as a control signal, the demodulator comprising interconnected logic gates and bistable triggers, a phase detector connected to the received data signals and to the output of the stepwise controlled frequency divider for comparing the zero crossings of the received data signals with the clock pulses and for providing a phase control signal, means for applying the phase control signal to the stepwise controlled frequency divider for synchronizing the clock pulses with the received data signals, a stepwise adjustable clock frequency divider connected to the output of the stepwise controlled frequency divider for providing a data receiver clock pulse signal having a selectable frequency, and means connecting the data receiver clock pulse signal to the demodulator as a data transmission speed control signal.
Claim 2
Dependent Claim 238 words
A digital synchronous modem for the synchronous FM transmission of binary coded data signals through cables and internal telephone lines, comprising a transmitter section; and a receiver section; the transmitter section comprising a modulator for transmitting the binary coded data signals, a main generator for generating a fundamental frequency, a stepwise controlled frequency divider connected to the main generator for providing clock pulses, means connecting the output of the stepwise controlled frequency divider to the modulator as a control signal, the modulator comprising interconnected logic gates and bistable triggers; the receiver section comprising a demodulator for receiving the binary coded data signals, means connecting the output of the stepwise controlled frequency divider to the demodulator as a control signal, the demodulator comprising interconnected logic gates and bistable triggers, a phase detector connected to the received data signals and to the output of the stepwise controlled frequency divider for comparing the zero crossings of the received data signals with the clock pulses and for providing a phase control signal, means for applying the phase control signal to the stepwise controlled frequency divider for synchronizing the clock pulses with the received data signals, a stepwise adjustable clock frequency divider connected to the output of the stepwise controlled frequency divider for providing a data receiver clock pulse signal having a selectable frequency, and means connecting the data receiver clock pulse signal to the demodulator as a data transmission speed control signal.
Claim 3
Dependent Claim 94 words
A digital synchronous modem as claimed in claim 1, wherein the transmitter section further comprises a second stepwise controlled frequency divider connected to the main generator for generating clock pulses controlling the modulator, a second phase detector, means for applying the clock pulses from the second stepwise controlled frequency divider and an external data transmitter clock pulse signal to the second phase detector, said second phase detector applying a control signal to the second stepwise controlled frequency divider for synchronizing the clock pulses for the modulator with said external data transmitter clock pulse signal.
Claim 4
Dependent Claim 69 words
A digital synchronous modem as claimed in claim 1, wherein the transmitter section further comprises an additional fixed frequency divider connected to the main generator for generating clock pulses controlling the modulator, and a stepwise adjustable clock frequency divider connected to the additional fixed frequency divider for providing a data transmitter clock pulse signal corresponding to the desired data transmission speed independent of said data receiver clock pulse signal.
Claim 5
Dependent Claim 35 words
A digital synchronous modem as claimed in claim 1, wherein the data receiver clock pulse signal provided by the first stepwise adjustable clock frequency divider is also applied as a control signal to the demodulator.
Claim 6
Dependent Claim 63 words
A digital synchronous modem as claimed in claim 1, the phase detector comprises a signal transition detector which is composed of bistable triggers and logical gates, and a phase corrector which is connected to the signal transition detector and is likewise composed of bistable triggers and logical gates, said phase corrector also being connected to the output of the stepwise controlled frequency divider.
Claim 7
Dependent Claim 33 words
A digital synchronous modem as claimed in claim 3, wherein the additional fixed frequency divider and the stepwise adjustable clock frequency divider connected thereto are composed of bistable triggers interconnected through logical gates.
Claim 8
Dependent Claim 132 words
A digital synchronous modem as claimed in claim 1, wherein the modulator comprises a bistable buffer trigger, a time control circuit provided with a logical gate for controlling the bistable buffer trigger, means for applying the clock pulses for the modulator directly to the logic gate of the time control circuit, a bistable trigger acting as a two-to-one divider receiving the clock pulses for the modulator and applying the divided clock pulses to the logic gate of the time control circuit, a frequency modulator circuit in the form of logical gates connected to the outputs of the buffer trigger, means applying two carrier pulse signals derived from the clock pulses to the frequency modulator circuit, and a bistable trigger acting as a two-to-one divider connected to the output of the modulator circuit.
Claim 9
Dependent Claim 74 words
A digital synchronous modem as claimed in claim 1, wherein the demodulator comprises a bistable buffeR trigger, a shift register connected thereto, both the buffer trigger and the shift register being controlled by the clock pulses, an EXCLUSIVE-OR circuit comprising logic gates connected to the outputs of the buffer trigger and the shift register, a bistable trigger controlled by the data receiver clock pulse signal being connected to the output of the EXCLUSIVE-OR circuit.
Claim 10
Dependent Claim 67 words
A digital synchronous modem as claimed in claim 1, further comprising a coupling stage connecting the modulator in the transmitter section to the cable, the coupling stage comprising an active lowpass filter, limiting elements shunting the input of the lowpass filter, an output transformer a switching transistor connecting the output of the lowpass filter to the output transformer, and a command signal stage operating the switching transmitter.

References Cited (Backward Citations)

US3665103A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1976-10-08 1977-04-09 1977-10-09 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1980-10-08 1981-04-09 1981-10-09 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1984-10-08 1985-04-09 1985-10-09 $7700.00 Window Closed / Lapsed

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