Apparatus for controlling power transmitted by a group of n phase conductors

Claim 3

An apparatus as claimed in claim 1, wherein said phase selecting means applies to the thyristors initial firing pulses determining the first conductive half-period of the successive trains in each cycle, the thyristors successively fired by the successive initial firing pulses being in a cyclic permutation order opposite to the succession order defined by the increasing voltage phase lag of the corresponding phase conductors.

Claim 4

An apparatus as claimed in claim 1, further comprising means dividing into sub-ranges the total power control range of the apparatus, each of said sub-ranges correspondiNg to a respective value of said whole number b.

Claim 5

An apparatus as claimed in claim 1, said apparatus comprising a first gating means transmitting synchronizing pulses issuing from each phase conductor conditionally in order to fire a thyristor associated with said conductor, a first mono-stable circuit having low and high states and allowing in its high state the transmission of said synchronizing pulses by said first gating means, the time-constant of said mono-stable circuit being such that the transition of said mono-stable circuit to its high state enables said first gating means to transmit a train of a consecutive synchronizing pulses causing the firing of the corresponding thyristors and the transmission by these thyristors of a corresponding train of a consecutive conductive half-periods, a voltage-to-frequency converter delivering power demand pulses, the frequency of which is an increasing function of a D.C. voltage adjustable between two pre-determined limits, a reversible counter counting additively the demand pulses supplied by said converter and subtractively the state changes of said mono-stable circuit from its low state to its high state, a second gating means transmitting conditionally to said mono-stable circuit an energizing pulse in response to an initiating synchronizing pulse derived from a sequentially selected one of the phase conductors, on condition that the count stored in said reversing counter equals at least ONE and that the synchronizing pulse immediately preceding said energizing pulse has not caused the corresponding thyristor to be fired, said phase selecting means comprising a phase selector adapted to transmit selectively to said second gating means a synchronizing pulse derived from one of said N sequentially selected phase conductors for each energizing pulse of said monostable circuit, as a function of the succession rank of the train of conductive half-periods initiated by said energizing pulse in the cycle to which said train belongs.

Claim 6

An apparatus as claimed in claim 4, wherein said phase selector comprises N inputs and N outputs respectively associated with said inputs, each of said inputs being connected to receive an excitation signal during the firing of a respective one of said thyristors, each of said outputs being connected to a first input of a respective AND gate having a second input for receiving the synchronizing pulses coming from a respective one of said N phase conductors, said phase selector having N different stable states, each one of which is initiated by the reception of said excitation signal by a respective one of said N inputs to cause a corresponding one of said AND gates to open, and wherein said initiating pulse is collected at the output of an OR gate having N inputs each connected to the output of a corresponding one of said AND gates.

Claim 7

An apparatus as claimed in claim 4, further comprising a second monostable circuit having low and high states, said second monostable circuit cooperating when in its high state with said first monostable circuit for allowing the passage through said first gating means of a + Nb consecutive synchronizing pulses, where the whole number b is equal to or greater than ONE, said second monostable circuit switching into its up state only when the count stored in said reversible counter is equal to or greater than a predetermined integer greater than ONE.

Claim 8

An apparatus as claimed in claim 6, further comprising a bistable trigger having low and high states, said bistable trigger being switched to its high state by the synchronizing pulses being passed through said first gating means and being switched to its low state by the synchronizing pulses not being passed through said first gating means, said bistable trigger being connected to said second gating means to prevent said second gating means from energizing said first monostable circuit device when said bistable trigger is in its high state, a thirD gating means delivering to said second monostable circuit an excitation pulse derived from said initiating synchronizing pulse on the condition that said bistable trigger is in its high state and that the count stored in said reversible counter is equal to or greater than said predetermined integer greater than ONE, said second monostable circuit being connected to said first monostable circuit to cause said first monostable circuit to be energized as long as said second monostable circuit remains in its high state.

Claim 9

An apparatus as claimed in claim 6, wherein N 3, for controlling the power fed to a load through first, second and third phase conductors supplied with three-phase alternating current having a period T, said load being coupled in delta to said first, second and third conductors through respective first, second and third thyristors, wherein the time-constant of said first monostable circuit lies strictly between T/3 and 2T/3.

Claim 10

An apparatus as claimed in claim 8, wherein said phase selector has three stable states respectively initiated by the firing of the first, second and third thyristors so as to cause respectively first, second and third AND gates to open, said first inputs of said first, second and third AND gates receiving respectively the synchronizing pulses derived from said second, third and first phase conductors.

Claim 11

An apparatus as claimed in claim 7, in which the time-constant of said second monostable circuit enables said second monostable circuit to cause three consecutive re-energizations of said first monostable circuit.