Three-phase power controller

Claim 1

In a power controller for controlling three-phase power to a non-unity power factor load, three power supply terminals to be connected to a source of three-phase power, means for connecting a non-unity power factor load across said three phase power supply terminals for supplying three-phase power to said load, at least three semiconductive load current carrying bidirectional gate means, each of said gate means being connected in series between a respective one of said power supply terminals and said load, each bidirectional gate means including a masteR gate and a slave gate for gating load current in opposite directions therethrough, synchronous control means for applying a sequence gating on signals to said respective gate means to conduct load current therethrough, means for supplying duty factor control signals to said synchronous control means for turning on and off the output of said synchronous control means as fed to said bidirectional gate means to determine the duty factor of the three phase power fed through said gate means to said load, the improvement wherein, said synchronous control means includes, means for sensing zero crossings of one of the components of alternating power applied across each respective paired set of said power supply terminals to derive respective zero crossing outputs, means for sensing a particular half-cycle of one of the components of the alternating power applied across each respective paired set of said terminals to derive respective half-cycle outputs, master gating signal generator means responsive to respective ones of said derived zero crossing outputs and respective ones of said half-cycle outputs to derive at least three respective master gating control outputs, means for feeding respective ones of said master gate control outputs to respective master gates of said bidirectional gate means for gating the load current therethrough in accordance with a predetermined master gate sequence, and means responsive to respective master gate outputs and to respective particular halfcycle outputs and to respective zero crossing outputs for deriving at least three respective slave gating control outputs, means for feeding respective ones of said slave gating outputs to respective slaves of said bidirectional gate means for gating load current through respective ones of said slave gates of said bidirectional gate means in accordance with a certain slave gating sequence.