Bus transport system for selection information and data

Claim 1

A switching unit for an information transport system for connecting a plurality of processors to a plurality of storage modules wherein information is transported between any processor and a storage module at substantially any instant, said switching unit comprising: A. a first priority circuit disposed between said processors and modules for granting the highest priority to one request of a plurality of requests received from said processors for connection to a given module provided that said given module is free; B. at least one selection bus connected to all of said storage modules for transporting selection information to said storage modules; C. at least one priority circuit disposed between the first priority circuit and said storage modules via said selection bus for determining which module has priority over the other modules when a request for access to a given module is granted by said first priority circuit, the selection information then being transported through said selection bus to said given storage module, after which the selection bus becomes available again for the transport of selection information to another module; D. at least one input bus and one output bus connected between said modules and said processors for transmitting information to be written and read as a consequence of said selection; E. a pair of priority circuits, one connected between the input bus and the processors, and the other between the output bus and the processors, for ensuring that ingress and egress of information to and from the modules is performed in accordance with a priority criterion; and F. registers disposed within the switching unit between the selection bus and said modules for reducing the occupation time of the selection bus by the time required to transport selection information from the selection bus to a storage module.