Voltage controllable crystal digital clock

Claim 2

A crystal controlled digital clock for generating essentially rectangular voltage signals comprising: a. at least two transistors having their bases coupled to each other via a first resistor with the base of one transistor also being coupled to ground potential and the base of the other transistor being coupled to ground via said first resistor, said transistors also having their emitters coupled to each other; b. a series-coupled quartz crystal and capacitor circuit coupled to the collector of said one transistor via a second resistor and also coupled directly to the base of said other transistor and to the base of said one transistor via the first resistor; c. first voltage supply means for supplying a first DC voltage of a first polarity to the emitters of said transistors via a third resistor and second DC voltage supply means for supplying a second voltage of a second polarity to the collector of said other transistor directly and to the collEctor of said one transistor via said second and a fourth resistor and further supplying said second voltage to the base of said transistor via said fourth resistor and said series-coupled quartz crystal and capacitor circuit and to the base of said one transistor via said fourth resistor, said series-coupled quartz crystal and capacitor circuit and said first resistor: and d. means for abstracting the generated rectangular voltage signal.

Claim 3

A crystal controlled digital clock as recited in claim 1 wherein said capacitor is a voltage variable reactance means and including control voltage supply means coupled to said voltage variable reactance means for supplying a control voltage to said voltage variable reactance means, said voltage variable reactance means responsive to the control voltage for varying the capacitance of said voltage variable reactance whereby the frequency of oscillation of said digital clock is varied.

Claim 4

A crystal controlled digital clock as recited in claim 2 wherein the values of said second and fourth resistors have a predetermined ratio to each other for initially maintaining said one transistor in an active region.

Claim 5

A crystal controlled clock as recited in claim 3 wherein said series-coupled quartz crystal and capacitor circuit operates in a series-resonant mode and said voltage variable reactance means is a varactor.

Claim 6

A crystal controlled digital clock as recited in claim 4 for generating essentially rectangular voltage signals further comprising: a. power supply noise suppression means coupled to the collector and emitter circuits of said transistors.

Claim 7

A voltage controllable crystal digital clock comprising: a. a first transistor coupled to a series resonant circuit comprised of a first resistor having a first and second resistor-terminal, a quartz crystal having a first and second crystal-terminal, and a capacitor having a first and second capacitor-terminal, said first resistor-terminal coupled to said first crystal-terminal, said second crystal-terminal coupled to said first capacitor-terminal and said second capacitor-terminal coupled to the base of said first transistor, said series resonant circuit being coupled between the collector and base of said first transistor, said capacitor being a voltage variable reactance means responsive to a control voltage for varying the capacitance of said voltage variable reactance and hence varying the frequency of oscillation of said digital clock; b. a switching circuit comprising a second transistor with its collector coupled to the first crystal-terminal of the quartz crystal of said series resonant circuit via a second resistor, with its base coupled to the second capacitor-terminal of the capacitor of said series resonant circuit via a third resistor, and with its emitter coupled to the emitter of said first transistor; c. first voltage supply means coupled to the base of said first transistor and the second resistor-terminal of said first reistor, and second voltage supply means coupled to the emitters of said first and second transistors via a fourth resistor, said first and second voltage supply means for supplying a positive and negative potential to said first and second transistors; and, d. means coupled to said digital clock for abstracting the generated digital signal from said digital clock.

Claim 8

A voltage controllable crystal digital clock comprising: a. a first transistor coupled to a series resonant circuit comprised of a first resistor having a first and second resistor-terminal, a quartz crystal having a first and second crystal-terminal, and a capacitor having a first and second capacitor-terminal, said first resistor-terminal coupled to said first crystal-terminal, said second crystal-terminal coupled to said first capacitor-terminal and said second capacitor-terminal coupled to the base of said first transistor, said series resonant circuit being coupled between the collector and base of said first transistor, said capacitor being a voltage variable reactance means responsive to a control voltage for varying the capacitance of said voltage variable reactance and hence varying the frequency of oscillation of said digital clock; b. a switching circuit comprising a second transistor with its collector coupled to the first crystal-terminal of the quartz crystal of said series resonant circuit via a second resistor, with its base coupled to the second capacitor-terminal of the capacitor of said series resonant circuit via a third resistor, and with its emitter coupled to the emitter of said first transistor; c. first voltage supply means coupled to the base of said first transistor and the second resistor-terminal of said first reistor, and second voltage supply means coupled to the emitters of said first and second transistors via a fourth resistor, said first and second voltage supply means for supplying a positive and negative potential to said first and second transistors; and, d. means coupled to said digital clock for abstracting the generated digital signal from said digital clock.

Claim 9

A voltage controllable digital clock as recited in claim 6 wherein said switching means is a quartz crystal operating in a series resonant mode at its nominal resonant frequency.

Claim 10

A voltage controllable digital clock as recited in claim 6 including power supply noise suppression means coupled to the collector and emitter circuits of said transistors.

Claim 11

A voltage controllable digital clock as recited in claim 8 wherein said power supply noise suppression means comprise resistors and capacitors.