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Common mode rejection means for differential circuits

Assignee: Bunker Ramo Corp
•
Filing: 1972-02-28
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Granted: 1973-09-25
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Expires: 1992-02-28
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Abstract

Abstract Electronic circuit apparatus for increasing the common mode rejection capability of a differential circuit. The circuit apparatus is comprised of a network which algebraically operates on first and second input signals, each comprised of an input information component and a common mode noise component, to cancel the common mode noise components and isolate the input information components for application to the differential circuit. Significantly, first and second input signal paths through the network are formed of passive components, thus permitting the paths to be easily balanced. The only active components in the network are contained within a common mode signal path which need not be balanced, but merely stable. As a consequence, prior art problems caused by unequal phase delays in first and second input signal paths are avoided.

Inventors

  • 👤 R Foerster

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-07 15:54
CPC Classifications
H; H03; H03F; H03F3/00; H03F3/45; H03F3/45071; H03F3/45076; H03F3/45475; H03F1/00; H03F1/26

Claims Analysis

Total Claims: 8
Claim 1
Independent Claim 280 words
Electronic circuit apparatus for amplifying the difference between first and second input signals with high common mode rejection over a wide frequency range, said first and second input signals being representable as (A + CM) and (B + CM), where (A - B) is the differential signaL which it is desired be amplified by said apparatus, and where (CM) is the common mode signal contained in each of the input signals which it is desired be rejected by said apparatus, said apparatus comprising: a common mode cancellation circuit to which said input signals are applied for producing first and second common mode cancellation circuit output signals having a difference proportional to (A - B) and with no common mode signal (CM) being contained in either of said first and second cancellation circuit output signals, and a differential amplifier to which said first and second cancellation circuit output signals are applied for providing differential amplification thereof, said common mode cancellation circuit including a voltage divider to which said input signals are applied for producing a composite signal at a junction of said voltage divider containing predetermined porportions of said first and second input signals, said common mode cancellation circuit also including an inverting ampliifer coupled to said junction and responsive to said composite signal for producing a cancellation signal of the form (-K1A/2 - K2B/2 - CM) where K1 and K2 are constants, and said common mode cancellation circuit further including summing means to which said first and second input signals and said cancellation signal are applied for algebraically summing each of first and second input signals with said cancellation signal to produce said first and second cancellation circuit output signals.
Claim 2
Dependent Claim 280 words
Electronic circuit apparatus for amplifying the difference between first and second input signals with high common mode rejection over a wide frequency range, said first and second input signals being representable as (A + CM) and (B + CM), where (A - B) is the differential signaL which it is desired be amplified by said apparatus, and where (CM) is the common mode signal contained in each of the input signals which it is desired be rejected by said apparatus, said apparatus comprising: a common mode cancellation circuit to which said input signals are applied for producing first and second common mode cancellation circuit output signals having a difference proportional to (A - B) and with no common mode signal (CM) being contained in either of said first and second cancellation circuit output signals, and a differential amplifier to which said first and second cancellation circuit output signals are applied for providing differential amplification thereof, said common mode cancellation circuit including a voltage divider to which said input signals are applied for producing a composite signal at a junction of said voltage divider containing predetermined porportions of said first and second input signals, said common mode cancellation circuit also including an inverting ampliifer coupled to said junction and responsive to said composite signal for producing a cancellation signal of the form (-K1A/2 - K2B/2 - CM) where K1 and K2 are constants, and said common mode cancellation circuit further including summing means to which said first and second input signals and said cancellation signal are applied for algebraically summing each of first and second input signals with said cancellation signal to produce said first and second cancellation circuit output signals.
Claim 3
Dependent Claim 30 words
The invention in accordance with claim 1, wherein each of said first and second common mode cancellation circuit output signals contains both A and B components of said input signals.
Claim 4
Dependent Claim 28 words
The invention in accordance with claim 1, wherein said first and second common mode cancellation circuit output signals are designatable as (A/2 - B/2) and (-A/2 + B/2).
Claim 5
Dependent Claim 43 words
The invention in accordance with claim 1, wherein said voltage divider combines said first and second input signals (A + CM) and (B + CM) in a manner to produce at said junction a composite signal designatable as (A/2 + B/2 + CM).
Claim 6
Dependent Claim 14 words
The invention in accordance with claim 1, wherein said inverting amplifier has unity gain.
Claim 7
Dependent Claim 34 words
The invention in accordance with claim 1, wherein said common mode cancellation circuit additionally includes a phase compensation network coupled to the output of said inverting amplifier for compensating for phase variation produced thereby.
Claim 8
Dependent Claim 74 words
The invention in accordance with claim 1, wherein said first and second common mode cancellation output signals are produced at respective first and second common mode cancellation circuit output terminals, and wherein said summing means includes first and second summing resistors respectively coupling said cancellation signal to said first and second output terminals and third and fourth summing resistors respectively coupling said first and second input signals to said first and second output terminals.

References Cited (Backward Citations)

US2977547A Cited
US3389340A Cited
US3516005A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1976-09-24 1977-03-26 1977-09-25 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1980-09-24 1981-03-26 1981-09-25 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1984-09-24 1985-03-26 1985-09-25 $7700.00 Window Closed / Lapsed

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