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US3760109A Expired / Lapsed US ⏱️ 0.0 years remaining

Time division multiplex transmission system

Assignee: Nissan Motor Co Ltd
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Filing: 1971-11-15
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Granted: 1973-09-18
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Expires: 1991-11-15
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Abstract

Abstract A system in which each single pulse generator is provided for producing each one single pulse representing each one information, which system including a transmitter consisting of at least two pulse signal generators for producing separate pulse signals each within a pulse duration of the single pulse on each channel, and at least two coding units provided in each channel for converting the pulse signals into corresponding binary coded signals, and a receiver consisting of at least two decoding units provided in each channel for re-converting the transmitted binary coded signals into original pulse signals.

Inventors

  • 👤 H Kogo
  • 👤 K Tanabe

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-25 22:11
CPC Classifications
G; G08; G08C; G08C15/00; G08C15/06; G08C15/12; H; H04; H04L; H04L5/00; H04L5/22; H04L5/24; H04L5/245; B; B60; B60R; B60R16/00; B60R16/02; B60R16/03; B60R16/0315

Claims Analysis

Total Claims: 5
Claim 1
Independent Claim 291 words
A time division multiplex transmission system for transmitting and receiving different instruction through respective channels, comprising: single pulse generating means for generating separate single pulse signals carrying said instructions provided in each of said channels, each of said single pulse signals having a predetermined pulse duration; a transmitter connected to said single pulse generating means and including first means for producing pulse signals each within said predetermined pulse duration, said pulse signals being separated from each other by a predetermined delay time and appearing on each of said channels and second means for converting said pulse signals into corresponding binary coded pulse signal fractions each appearing on each of said channels within a time period less than said predetermined delay time, said second means comprising a plurality of coding units each provided in each of said channels, one of said coding units including a plurality of n parallel-connected basic rectifiers connected to one of said channels for dividing said pulse sigNal into a plurality of n signal fractions and delay circuits provided in n-1 of said basic rectifiers for delaying said pulse signal fractions progressively by a predetermined time interval, the sum of said predetermined time intervals being less than said predetermined delay time, another coding unit including a plurality of n parallel-connected additional rectifiers connected to another channel and also connected in parallel to outputs of said basic rectifiers, at least one of said additional rectifiers being connected in series to an inverter for inverting at least one of the pulse signal fractions thereby to differentiate the binary coded signals from each other; and a receiver connected to said transmitter and including third means for receiving and re-converting the transmitted binary coded pulse signal fractions into corresponding said pulse signals.
Claim 2
Dependent Claim 291 words
A time division multiplex transmission system for transmitting and receiving different instruction through respective channels, comprising: single pulse generating means for generating separate single pulse signals carrying said instructions provided in each of said channels, each of said single pulse signals having a predetermined pulse duration; a transmitter connected to said single pulse generating means and including first means for producing pulse signals each within said predetermined pulse duration, said pulse signals being separated from each other by a predetermined delay time and appearing on each of said channels and second means for converting said pulse signals into corresponding binary coded pulse signal fractions each appearing on each of said channels within a time period less than said predetermined delay time, said second means comprising a plurality of coding units each provided in each of said channels, one of said coding units including a plurality of n parallel-connected basic rectifiers connected to one of said channels for dividing said pulse sigNal into a plurality of n signal fractions and delay circuits provided in n-1 of said basic rectifiers for delaying said pulse signal fractions progressively by a predetermined time interval, the sum of said predetermined time intervals being less than said predetermined delay time, another coding unit including a plurality of n parallel-connected additional rectifiers connected to another channel and also connected in parallel to outputs of said basic rectifiers, at least one of said additional rectifiers being connected in series to an inverter for inverting at least one of the pulse signal fractions thereby to differentiate the binary coded signals from each other; and a receiver connected to said transmitter and including third means for receiving and re-converting the transmitted binary coded pulse signal fractions into corresponding said pulse signals.
Claim 3
Dependent Claim 44 words
A time division multiplex transmission system according to claim 1, wherein said single pulse generating means comprises a switch circuit provided in each of said channel and an input pulse generator connected to said switch circuit and associated therewith for producing said single pulses.
Claim 4
Dependent Claim 153 words
A time division multiplex transmission system according to claim 2, wherein said first means comprises a clock pulse generator for producing a clock pulse train having a predetermined repetition rate equal to said predetermined pulse duration of said single pulse, delay circuits provided between AND gates of said channels, and connected to said clock pulse generator for delaying said clock pulse train by said predetermined delay time, and AND gates each provided in each of said channels and having two input terminals and one output terminal respectively, one of said two input terminals of one of said AND gates being connected to one of said input pulse generators and the other one to said clock pulse generator, and one of the two input terminals of the other AND gate being connected to the other of said input pulse generators and the other one to said delay circuit associated with said clock pulse generator.
Claim 5
Dependent Claim 188 words
A time division multiplex transmission system according to claim 3, wherein said third means comprises a plurality of decoding units, one of said decoding units including a plurality of n parallel-connected basic rectifiers corresponding to the number of n basic rectifiers of said coding unit, delay circuits provided in n-1 of said basic recitifiers of said decoding unit for delaying said pulse signal fractions of the transmitted binary coded signal from each other progressively by a time interval equal to said predetermined time interval, and an AND gate having the input terminals connected to said basic rectifiers of said decoding unit and an output terminal at which the decoded pulse signal appears, and the other of said decoding units including a plurality of n parallel-connected additional rectifiers, delay circuits provided in n-1 of said additional rectifiers, at least one of the additional rectifiers being connected in series to an inverter so as to associate with said inverter of said coding unit, and an AND gate having its input terminals connected to said additional rectifiers of said decoding unit and an output terminal at which the pulse signal appears.

References Cited (Backward Citations)

US3602647A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1976-09-17 1977-03-19 1977-09-18 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1980-09-17 1981-03-19 1981-09-18 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1984-09-17 1985-03-19 1985-09-18 $7700.00 Window Closed / Lapsed

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