Digital to analog conversion apparatus

Claim 1

An apparatus for accurate reconstruction of an output analog signal from a digital data signal comprising: means for demultiplexing the incoming data stream corresponding to said digital data signal and retrieving therefrom clock voltage pulses representing the clock signal associated with said digital data signal; serial to parallel converter means forming data words each composed of a plurality of successive digital bits from said digital data signal; shift register means comprising n + 1 stages for storing successive digital data values of said digital data signal, said shift register means being driven by said clock voltage pulses whereby successive data values of said data signal are read into said shift register means; digital to analog converter means for converting the plurality of digital values in said shift register means to a plurality of corresponding amplitude values, said amplitude values representing the output of said converter means; analog storage means for storing the successive amplitude samples from said converter means, said analog storage means operable in synchronism with the serial data stream of said digital data signal by means of said clock voltage pulses; and output means for interpolating between the successive amplitude samples from said converter means in accordance with an nth order polynomial mathematical function y (t) where t is the time interval beTween successive amplitude samples, said output means comprising initial condition circuitry responsive to said clock pulses for generating signals representing successive derivatives of said digital data signal and integrator means receiving said derivative signals from the initial condition circuitry and driven by said clock pulses for integrating the output of said converter means to thereby form the output analog signal during the intervals between successive amplitude samples from said converter means whereby transitions between amplitude samples are minimized and the output analog signal is accurately reconstructed.

Claim 2

An apparatus for accurate reconstruction of an output analog signal from a digital data signal comprising: means for demultiplexing the incoming data stream corresponding to said digital data signal and retrieving therefrom clock voltage pulses representing the clock signal associated with said digital data signal; serial to parallel converter means forming data words each composed of a plurality of successive digital bits from said digital data signal; shift register means comprising n + 1 stages for storing successive digital data values of said digital data signal, said shift register means being driven by said clock voltage pulses whereby successive data values of said data signal are read into said shift register means; digital to analog converter means for converting the plurality of digital values in said shift register means to a plurality of corresponding amplitude values, said amplitude values representing the output of said converter means; analog storage means for storing the successive amplitude samples from said converter means, said analog storage means operable in synchronism with the serial data stream of said digital data signal by means of said clock voltage pulses; and output means for interpolating between the successive amplitude samples from said converter means in accordance with an nth order polynomial mathematical function y (t) where t is the time interval beTween successive amplitude samples, said output means comprising initial condition circuitry responsive to said clock pulses for generating signals representing successive derivatives of said digital data signal and integrator means receiving said derivative signals from the initial condition circuitry and driven by said clock pulses for integrating the output of said converter means to thereby form the output analog signal during the intervals between successive amplitude samples from said converter means whereby transitions between amplitude samples are minimized and the output analog signal is accurately reconstructed.

Claim 3

An apparatus for accurate reconstruction of an output analog signal from a digital data signal comprising: means for retrieving from said digital data signal clock voltage pulses representing the clock signal associated with said digital data signal; shift register means comprising n + 1 stages for storing successive digital data values of said digital data signal, said shift register means being driven by said clock voltage pulses whereby successive data values of said data signal are read into said shift register means; digital to analog converter means for converting the plurality of digital values in said shift register means to a plurality of corresponding amplitude values; analog storage means for storing the successive amplitude samples from said converter means, said analog storage means operable in synchronism with the serial data stream of said digital data signal by means of said clock voltage pulses; and output means for interpolating between the successive amplitude samples from said analog storage means in accordance with an nth order polynomial mathematical function y (t) of the time interval t between successive amplitude samples and thereby form the output analog signal wherein transitions between amplitude samples are minimized and the output analog signal is accurately reconstructed, said output means comprising integrator means for integrating the output of said converter means to form the output analog signal during the intervals between successive amplitude samples from said converter means; and means being responsive to said clock voltage pulses for computing initial conditions for said integrator means based upon n + 1 successive amplitude samples from said converter means, wherein said output means interpolates between successive output amplitude samples in accordance with said nth order polynomial function.

Claim 4

An apparatus for accurate reconstruction of an output analog signal from a digital data signal comprising: means for retrieving from said digital data signal clock voltage pulses representing the clock signal associated with said digital data signal; shift register means comprising n + 1 stages for storing successive digital data values of said digital data signal, said shift register means being driven by said clock voltage pulses whereby successive data values of said data signal are read into said shift register means; digital to analog converter means for converting the plurality of digital values in said shift register means to a plurality of corresponding amplitude values; analog storage means for storing the successive amplitude samples from said converter means, said analog storage means operable in synchronism with the serial data stream of said digital data signal by means of said clock voltage pulses; and output means for interpolating between the successive amplitude samples from said analog storage means in accordance with an nth order polynomial mathematical function y (t) of the time interval t between successive amplitude samples and thereby form the output analog signal wherein transitions between amplitude samples are minimized and the output analog signal is accurately reconstructed, said output means comprising integrator means for integrating the output of said converter means to form the output analog signal during the intervals between successive amplitude samples from said converter means; and means being responsive to said clock voltage pulses for computing initial conditions for said integrator means based upon n + 1 successive amplitude samples from said converter means, wherein said output means interpolates between successive output amplitude samples in accordance with said nth order polynomial function.