Sample-and-hold circuit

Claim 1

A sample-and-hold system for taking an accurate, instantaneous sample of an input signal and hold this value as a fixed output voltage until the next sample is taken, comprising: a. an input operational amplifier connected to an input signal source; b. an output operational amplifier; c. a sample switch means connecting the output of said input amplifier to the input of said output amplifier; d. capacitor means in parallel with said sample switch means also connected to the input of said output amplifier; e. a feedback path between the output of said output amplifier and the input to said input amplifier; f. a pair of oppositely poled diodes connected between said feedback path and the output of said input amplifier; g. said switch means being closed during the sample period of operation of the system charging said capacitor means with the sampled voltage, said switch means being opened during the hold period and the sampled voltage being held on said capacitor means until needed, providing precision sampling of the input voltage with the sample time short relative to the sample period, and negligible decay in voltage during maximum hold time; h. said diode pair preventing saturation of said input amplifier during the hold period by closing a negative feedback path around the input amplifier when the signal level exceeds diode conduction voltage; i. resistive means provided for isolating the input signal source from active components of the sample-and-hold system, the system presenting a high and constant resistive load to the protecting signal source at all times, prtecting the signal source by preventing abnormal loading thereof in the event of circuit failure; and J. said system presents a low output impedance to the load at all times, during both sample and hold periods.