Signal sorting system

Claim 2

A signal sorting system comprising: input and output signal terminals; signal summing means having one input connected to said input terminal and an output connected to said output terminal for subtracting from input signals applied to said input terminal estimate signals applied to the other input of signal summing means to provide error signals at said output terminal; signal extractor means comprising; signal generator means for generating a reference signal representing the carrier frequency component of one of said input signals, modulator means comprising a first signal mixer connected to said output terminal and said signal generator means for combining said one error and reference signals to provide the amplitude component signal of said one input signal, and a second signal mixer connected to said first signal mixer, signal generator means and summing means for combining said amplitude component and reference signals to provide said one estimate signal, and said modulator means being connected to said output terminal, signal summing means, and signal generator means for supplying said reference signal with a signal representing the amplitude component of one of said input signals in response to said one error signal to provide one of said estimate signals; and said signal extractor means being connected to said output terminal and said other signal summing means input for providing said estimate signals in response to said error signals.

Claim 3

A signal sorting system according to claim 1 wherein said signal extractor means comprises: a plurality of signal extractors, each of said extractors being responsive to one of said error signals to provide one of said estimate signals.

Claim 4

A signal sorting system according to claim 1 wherein said signal generator means comprises: a phase lock loop connected to said out-put terminal and responsive to said one error signal for generating said reference signal which follows the carrier frequency of said one input signal.

Claim 5

A signal sorting system according to claim 1 further comprising: voltage multiplier means interconnecting said output terminal and said signal generator means, said voltage multiplier means being connected to said first signal mixer and responsive to said amplitude component signal for varying the instantaneous gain of said signal generator means in accordance with said amplitude component signal.

Claim 6

A signal sorting system according to claim 4 further comprising: 90* phase shift means interconnecting said phase lock loop and said first and second mixers for shifting the phase of said reference signal 90*.

Claim 7

A signal sorting system according to claim 1 wherein said modulator means comprises: a first signal mixer connected to said output terminal and said signal generator means for combining said one error and reference signals to provide the in-phase amplitude component signal of said one input signal; a second Signal mixer connected to said first signal mixer and said signal generator means for combining said in-phase amplitude component and reference signals to provide an in-phase portion of said one estimate signal; a 90* phase shifter connected to said signal generator means for shifting the phase of said reference signal 90*; a third signal mixer connected to said output terminal and said phase shifter for combining said one error and phase shifted reference signals to provide the quadrature amplitude component signal of said one input signal; a fourth signal mixer connected to said third signal mixer and said phase shifter for combining said quadrature amplitude component and phase shifted reference signals to provide a quadrature portion of said one estimate signal; and a signal summer connected to said second and fourth signal mixers and said signal summing means for combining said in-phase and quadrature portions of said one estimate signal to provide said one estimate signal;

Claim 8

A signal sorting system according to claim 6 further comprising: signal filter means interconnecting said first and second signal mixers, said signal filter means being matched to the signal line rate and intraline correlation of said one input signal.

Claim 9

A signal sorting system according to claim 7 further comprising: a second signal filter means interconnecting said third and fourth signal mixers, said second signal filter means being matched to the signal line rate and intraline correlation of said one input signal.

Claim 10

A signal sorting system according to claim 1 wherein said signal generator means comprises: a local oscillator.

Claim 11

A signal sorting system according to claim 1 further comprising: means interconnecting said modulator means and summing means and responsive to said amplitude component signal for applying said one estimate signal to said summing means to subtract from a succeeding one of said input signals.

Claim 12

A signal sorting system according to claim 10 wherein said interconnection means comprises: envelope detector means connected to said modulator means for detecting the in-phase and quadrature amplitude component signals; summing means for summing said in-phase and quadrature amplitude component signals; signal recognizer means connected to said summing means and responsive to said summed in-phase and quadrature amplitude component signals for providing an output signal, said output signal being delayed one signal repetition interval; gate means interconnecting said signal recognizer means, modulator means, and signal summing means to subtract from a succeeding one of said input signals in response to said output signal.

Claim 13

A signal sorting system according to claim 11 wherein said signal recognizer means comprises: a comb filter connected to said summing means, said comb filter being tuned to the repetition interval of said one input signal for passing said amplitude component signal; a threshold circuit connected to said comb filter for generating a signal in response to said amplitude component signal; a signal width measurer connected to said comb filter for generating a signal in response to said amplitude component signal; an AND gate connected to said threshold circuit and said pulse width measurer for generating said output signal in response to said signals from said threshold circuit and pulse width measurer; and a delay circuit connected to said AND gate and said gate means for delaying application of said output signal to said gate means one signal repetition interval.

Claim 14

A frequency modulated signal sorting system comprising: input and output signal terminals; signal summing means connected to said input and output terminals for subtracting from a frequency modulated input signal applied to said input terminal an estimate signal to provide an error signal at said output terminal; a phase lock loop connected to said out-put terminal and responsive to said error signal for generating a reference signal which follows the carrier frequency of said input signal; a 90* phase shifter connected to said phase lock loop for shifting the phase of said reference signal 90*; a first signal mixer connected to said output terminal and said phase shifter for combining said error and phase shifted reference signals to provide the amplitude component signal of said input signal; a second signal mixer connected to said first signal mixer, phase shifter, and summing means for combining said amplitude component and phase shifted reference signals to provide said estimate signal; and a voltage multiplier interconnecting said output terminal and said phase lock loop, said voltage multiplier being connected to said first signal mixer and responsive to said amplitude component signal for varying the instantaneous gain of said phase lock loop in accordance with said amplitude component signal.

Claim 15

A frequency modulated signal sorting system comprising: input and output signal terminals; signal summing means connected to said input and output terminals for subtracting from a frequency modulated input signal applied to said input terminal an estimate signal to provide an error signal at said output terminal; a phase lock loop connected to said out-put terminal and responsive to said error signal for generating a reference signal which follows the carrier frequency of said input signal; a 90* phase shifter connected to said phase lock loop for shifting the phase of said reference signal 90*; a first signal mixer connected to said output terminal and said phase shifter for combining said error and phase shifted reference signals to provide the amplitude component signal of said input signal; a second signal mixer connected to said first signal mixer, phase shifter, and summing means for combining said amplitude component and phase shifted reference signals to provide said estimate signal; and a voltage multiplier interconnecting said output terminal and said phase lock loop, said voltage multiplier being connected to said first signal mixer and responsive to said amplitude component signal for varying the instantaneous gain of said phase lock loop in accordance with said amplitude component signal.

Claim 16

A television signal sorting system comprising: input and output signal terminals; signal summing means connected to said input and output terminals for subtracting from a television input signal applied to said input terminal an estimate signal to provide an error signal at said output terminal; a phase lock loop connected to said output terminal and responsive to said error signal for generating a reference signal which follows the carrier frequency of said input signal; a first signal mixer connected to said output terminal and said phase lock loop for combining said error and reference signals to provide the in-phase amplitude component signal of said input signal; a second signal mixer connected to said first signal mixer and said phase lock loop for combining said inphase amplitude component and reference signals to provide an in-phase portion of said estimate signal; a 90* phase shifter connected to said phase lock loop for shifting the phase of said reference signal 90*; a third signal mixer connected to said output terminal and said phase shifter for combining said error and phase shifted reference signals to provide the quadrature amplitude component signal of said input signal; a fourth signal mixer connected to said third signal mixer and said phase shifter for combining said quadrature amplitude component and phase shifted reference signals to provide a quadrature portion of said estimate signal; a signal summer connected to said second and fourth signal mixers and said signal summing means for combining said in-phase and quadrature portions of said estimate signal to provide said estimate signal; a first signal filter means interconnecting said first and second signal mixers, said signal filter means being matched to the signal line rate and intraline correlation of said input signal; and a second signal filter means 1nterconnecting said third and fourth signal mixers, said second signal filter means being matched to the signal line rate and intraline correlation of said input signal.

Claim 17

A television signal sorting system comprising: input and output signal terminals; signal summing means connected to said input and output terminals for subtracting from a television input signal applied to said input terminal an estimate signal to provide an error signal at said output terminal; a phase lock loop connected to said output terminal and responsive to said error signal for generating a reference signal which follows the carrier frequency of said input signal; a first signal mixer connected to said output terminal and said phase lock loop for combining said error and reference signals to provide the in-phase amplitude component signal of said input signal; a second signal mixer connected to said first signal mixer and said phase lock loop for combining said inphase amplitude component and reference signals to provide an in-phase portion of said estimate signal; a 90* phase shifter connected to said phase lock loop for shifting the phase of said reference signal 90*; a third signal mixer connected to said output terminal and said phase shifter for combining said error and phase shifted reference signals to provide the quadrature amplitude component signal of said input signal; a fourth signal mixer connected to said third signal mixer and said phase shifter for combining said quadrature amplitude component and phase shifted reference signals to provide a quadrature portion of said estimate signal; a signal summer connected to said second and fourth signal mixers and said signal summing means for combining said in-phase and quadrature portions of said estimate signal to provide said estimate signal; a first signal filter means interconnecting said first and second signal mixers, said signal filter means being matched to the signal line rate and intraline correlation of said input signal; and a second signal filter means 1nterconnecting said third and fourth signal mixers, said second signal filter means being matched to the signal line rate and intraline correlation of said input signal.

Claim 18

A signal extractor comprising: a signal generator means, comprising a phase lock loop, for generating a reference signal representing the carrier frequency component of the signal; modulator means comprising; first means for combining the signal error with said reference signal to provide the amplitude modulating signal of the signal, and second means for combining said reference and amplitude modulating signals to provide an estimate signal; and said modulator means being connected to said signal generator means for supplying said reference signal with a signal representing the amplitude component of the signal in response to signal error to provide the estimate signal.

Claim 19

A signal extractor comprising: a signal generator means, comprising a phase lock loop, for generating a reference signal representing the carrier frequency component of the signal; modulator means comprising; first means for combining the signal error with said reference signal to provide the amplitude modulating signal of the signal, and second means for combining said reference and amplitude modulating signals to provide an estimate signal; and said modulator means being connected to said signal generator means for supplying said reference signal with a signal representing the amplitude component of the signal in response to signal error to provide the estimate signal.

Claim 20

A signal extractor according to claim 15 further comprising: voltage multiplier means connected to said signal generator means, said voltage multiplier means being connected to said first signal combininG means and responsive to said amplitude component signal for varying the instantaneous gain of said signal generator means in accordance with said amplitude component signal.

Claim 21

A signal extractor according to claim 15 further comprising: 90* phase shift means interconnecting said signal generator means and said first signal combining means for shifting phase of said reference signal 90*.

Claim 22

A signal extractor according to claim 15 wherein said modulator means comprises: a first signal mixer connected to said signal generator means for combining error and said reference signals to provide the in-phase amplitude component of the signal; a second signal mixer connected to said first signal mixer and said signal generator means for combining said in-phase signals to provide an in-phase portion of said estimate signal; a 90* phase shifter connected to said signal generator means for shifting the phase of said reference signal 90*; a third signal mixer connected to said phase shifter for combining said error and phase shifted reference signals to provide the quadrature amplitude component of the signal; a fourth signal mixer connected to said third signal mixer and said phase shifter for combining said quadrature amplitude component and phase shifted reference signals to provide a quadrature portion of said estimate signal; and a signal summer connected to said second and fourth signal mixers for combining said in-phase and quadrature portions of said estimate signal.

Claim 23

A signal extractor according to claim 18 further comprising: first and second filter means interconnecting said first and second and third and fourth signal mixers, respectively, said filter means being matched to the signal line rate and intraline correlation of the signal.

Claim 24

A signal extractor according to claim 15 wherein said signal generator means comprises: a local oscillator.

Claim 25

A signal extractor according to claim 15 further comprising: means connected to said modulator means and responsive to said amplitude component signal for providing said estimate signal.

Claim 26

A signal extractor according to claim 21 wherein said connection means comprises: envelope detector means connected to said modulator means for detecting the in-phase and quadrature portions of said amplitude component signal; summing means for summing said in-phase and quadrature portions of said amplitude component signal; signal recognizer means connected to said summing means and responsive to said amplitude component signal for providing an output signal, said output signal being delayed one signal repetition interval; and gate means connected to said signal recognizer means and modulator means for passing said estimate signal in response to said output signal.

Claim 27

A signal extractor according to claim 22 wherein said signal recognizer means comprises: a comb filter connected to said summing means, said comb filter being tuned to the repetition interval of the signal for passing said amplitude component signal; a threshold circuit connected to said comb filter for generating a signal in response to said amplitude component signal; a signal with measurer connected to said comb filter for generating a signal in response to said amplitude component signal; an AND gate connected to said threshold circuit and said pulse width measurer for generating said output signal in response to said signals from said threshold circuit and pulse width measurer; and a delay circuit connected to said AND gate for delaying said output signal one signal repetition interval.

Claim 28

A frequency modulated signal extractor comprising: a phase lock loop responsive to signal error for generating a reference signal which follows the carrier frequency of the signal; a 90* phase shift connected to said phase lock loop for shifting the phase of said reference signal 90*; a fIrst signal mixer connected to said phase shifter for combining the error and phase shifted reference signals to provide the amplitude component signal; a second signal mixer connected to said first signal and phase shifter for combining said amplitude component and phase shifted reference signals to provide an estimate signal; and a voltage multiplier connected to said phase lock loop, said voltage multiplier being connected to said first signal mixer and responsive to said amplitude component signal for varying the instantaneous gain of said phase lock loop in accordance with said amplitude component signal.

Claim 29

A frequency modulated signal extractor comprising: a phase lock loop responsive to signal error for generating a reference signal which follows the carrier frequency of the signal; a 90* phase shift connected to said phase lock loop for shifting the phase of said reference signal 90*; a fIrst signal mixer connected to said phase shifter for combining the error and phase shifted reference signals to provide the amplitude component signal; a second signal mixer connected to said first signal and phase shifter for combining said amplitude component and phase shifted reference signals to provide an estimate signal; and a voltage multiplier connected to said phase lock loop, said voltage multiplier being connected to said first signal mixer and responsive to said amplitude component signal for varying the instantaneous gain of said phase lock loop in accordance with said amplitude component signal.

Claim 30

A television signal extractor comprising: a phase lock loop responsive to an error television signal for generating a reference signal which follows the carrier frequency of the television signal; a first signal mixer connected to said phase lock loop for combining said error and reference signals to provide the in-phase amplitude component signal of said television signal; a second mixer connected to said first signal mixer and said phase lock loop for combining said in-phase amplitude component and reference signals to provide an in-phase portion of an estimate television signal; a 90* phase shifter connected to said phase lock loop for shifting the phase of said reference signal 90*; a third signal mixer connected to said phase shifter for combining said error and phase shifted reference signals to provide the quadrature amplitude component signal of said television signal; a fourth signal mixer connected to said third signal mixer and said phase shifter for combining said quadrature amplitude component and phase shifted reference signals to provide a quadrature portion of said estimate signal; a signal summer connected to said second and fourth signal mixers for combining said in-phase and quadrature portion of said estimate signal to provide said estimate signal; a first signal filter means interconnecting said first and second signal mixers, said signal filter means being matched to the signal line rate and intraline correlation of said television signal; and a second signal filter means interconnecting said third and fourth signal mixers, said second signal filter means being matched to the signal line rate and intraline correlation of said television signal.

Claim 31

A television signal extractor comprising: a phase lock loop responsive to an error television signal for generating a reference signal which follows the carrier frequency of the television signal; a first signal mixer connected to said phase lock loop for combining said error and reference signals to provide the in-phase amplitude component signal of said television signal; a second mixer connected to said first signal mixer and said phase lock loop for combining said in-phase amplitude component and reference signals to provide an in-phase portion of an estimate television signal; a 90* phase shifter connected to said phase lock loop for shifting the phase of said reference signal 90*; a third signal mixer connected to said phase shifter for combining said error and phase shifted reference signals to provide the quadrature amplitude component signal of said television signal; a fourth signal mixer connected to said third signal mixer and said phase shifter for combining said quadrature amplitude component and phase shifted reference signals to provide a quadrature portion of said estimate signal; a signal summer connected to said second and fourth signal mixers for combining said in-phase and quadrature portion of said estimate signal to provide said estimate signal; a first signal filter means interconnecting said first and second signal mixers, said signal filter means being matched to the signal line rate and intraline correlation of said television signal; and a second signal filter means interconnecting said third and fourth signal mixers, said second signal filter means being matched to the signal line rate and intraline correlation of said television signal.

Claim 32

A radar signal sorting system comprising: input and output signal terminals; signal summing means connected to said input and output terminals for subtracting from a radar input signal applied to said input terminal an estimate signal to provide an error signal at said output terminal; a local oscillator for generating a reference signal having a frequency substantially equal to the carrier frequency of said radar signals; a first signal mixer connected to said local oscillator and said output terminal for combining said radar and reference signals to provide the in-phase amplitude component signal of said radar signal; a second signal mixer connected to said first signal mixer and said local oscillator for combining said in-phase amplitude component and reference signals to provide an in-phase portion of a radar estimate signal; a 90* phase shifter connected to said local oscillator for shifting the phase of said reference signal 90*; a third signal mixer connected to said output terminal and said phase shifter for combining said radar error signal and phase shifted reference signal to provide the quadrature amplitude component signal of said radar signal; a fourth signal mixer connected to said third signal mixer and said phase shifter for combining said quadrature amplitude component and phase shifter reference signals to provide a quadrature portion of said radar estimate signal; a signal summer connected to said second and fourth signal mixers for combining said in-phase and quadrature portions of said radar estimate signal to provide said radar estimate siGnal; envelope detector means connected to said first and third signal mixers for detecting the in-phase and quadrature amplitude component signal; summing means connected to said envelope detector means for summing said in-phase and quadrature amplitude component signal; a comb filter connected to said summing means, said comb filter being tuned to the repetition interval of said radar signal for passing said summed in-phase and quadrature component signal; a threshold circuit connected to said comb filter for generating a signal in response to said summed in-phase and quadrature component signal; a signal width measurer connected to said comb filter for generating a signal in response to said summed in-phase and quadrature component signal; an AND gate connected to said threshold circuit and said pulse width measurer for generating an output signal in response to said signal from said threshold circuit and pulse width measurer; a delay circuit connected to said AND gate for delaying said output signal one radar repetition interval; and an AND gate connected to said summing means, said signal summer connected to said second and fourth signal mixers, and said delay circuit for passing said radar estimate signal to said summing means to subtract therein from said radar signal in response to said delayed output signal.

Claim 33

A radar signal sorting system comprising: input and output signal terminals; signal summing means connected to said input and output terminals for subtracting from a radar input signal applied to said input terminal an estimate signal to provide an error signal at said output terminal; a local oscillator for generating a reference signal having a frequency substantially equal to the carrier frequency of said radar signals; a first signal mixer connected to said local oscillator and said output terminal for combining said radar and reference signals to provide the in-phase amplitude component signal of said radar signal; a second signal mixer connected to said first signal mixer and said local oscillator for combining said in-phase amplitude component and reference signals to provide an in-phase portion of a radar estimate signal; a 90* phase shifter connected to said local oscillator for shifting the phase of said reference signal 90*; a third signal mixer connected to said output terminal and said phase shifter for combining said radar error signal and phase shifted reference signal to provide the quadrature amplitude component signal of said radar signal; a fourth signal mixer connected to said third signal mixer and said phase shifter for combining said quadrature amplitude component and phase shifter reference signals to provide a quadrature portion of said radar estimate signal; a signal summer connected to said second and fourth signal mixers for combining said in-phase and quadrature portions of said radar estimate signal to provide said radar estimate siGnal; envelope detector means connected to said first and third signal mixers for detecting the in-phase and quadrature amplitude component signal; summing means connected to said envelope detector means for summing said in-phase and quadrature amplitude component signal; a comb filter connected to said summing means, said comb filter being tuned to the repetition interval of said radar signal for passing said summed in-phase and quadrature component signal; a threshold circuit connected to said comb filter for generating a signal in response to said summed in-phase and quadrature component signal; a signal width measurer connected to said comb filter for generating a signal in response to said summed in-phase and quadrature component signal; an AND gate connected to said threshold circuit and said pulse width measurer for generating an output signal in response to said signal from said threshold circuit and pulse width measurer; a delay circuit connected to said AND gate for delaying said output signal one radar repetition interval; and an AND gate connected to said summing means, said signal summer connected to said second and fourth signal mixers, and said delay circuit for passing said radar estimate signal to said summing means to subtract therein from said radar signal in response to said delayed output signal.

Claim 34

A radar signal extractor comprising: a local oscillator for generating a reference signal having a frequency substantially equal to the carrier frequency of the radar signal; a first signal mixer connected to said local oscillator for combining a radar error signal and said reference signal to provide the in-phase amplitude component signal of said radar signal; a second signal mixer connected to said first signal mixer and said local oscillator for combining said in-phase amplitude component and reference signals to provide an in-phase portion of a radar estimate signal; a 90* phase shifter connected to said local oscillator for shifting the phase of said reference signal 90*; a third signal mixer connected to said phase shifter for combining the radar error and phase shifter reference signals to provide the quadrature amplitude component signal of said radar signal; a fourth signal mixer connected to said third signal mixer and said phase shifter for combining said quadrature amplitude component and phase shifted reference signals to provide a quadrature portion of said radar estimate signal; a signal summer connected to said second and fourth signal mixers for combining said in-phase and quadrature portions of said radar estimate signal to provide said radar estimate signal; a signal summer connected to said second and fourth signal mixers for combining said in-phase and quadrature portions of said radar estimate signal to provide said radar estimate signal; envelope detector means connected to said first and third signal mixers for detecting the in-phase and quadrature amplitude component signals; a signal summer connected to said envelope detector means for summing said in-phase and quadrature amplitude component signals; a comb filter connected to said summing means said comb filter being tuned to the repetition interval of said radar signal for passing said summed in-phase and quadrature component signals; a threshold circuit connected to said comb filter for generating a signal in response to said summed in-phase and quadrature component signals; a signal width measurer connected to said comb filter for generating a signal in response to said summed in-phase and quadrature component signals; an AND gate connected to said threshold circuit and said pulse width measurer for generating an output signal in response to said signals from said threshold circuit and pulse width measurer; a delay circuit connected to said AND gate for delaying said output signal one radar signal repetition interval; and an AND gate cOnnected to said signal summer and said delay circuit for passing said radar estimate signal in response to said delayed output signal.

Claim 35

A radar signal extractor comprising: a local oscillator for generating a reference signal having a frequency substantially equal to the carrier frequency of the radar signal; a first signal mixer connected to said local oscillator for combining a radar error signal and said reference signal to provide the in-phase amplitude component signal of said radar signal; a second signal mixer connected to said first signal mixer and said local oscillator for combining said in-phase amplitude component and reference signals to provide an in-phase portion of a radar estimate signal; a 90* phase shifter connected to said local oscillator for shifting the phase of said reference signal 90*; a third signal mixer connected to said phase shifter for combining the radar error and phase shifter reference signals to provide the quadrature amplitude component signal of said radar signal; a fourth signal mixer connected to said third signal mixer and said phase shifter for combining said quadrature amplitude component and phase shifted reference signals to provide a quadrature portion of said radar estimate signal; a signal summer connected to said second and fourth signal mixers for combining said in-phase and quadrature portions of said radar estimate signal to provide said radar estimate signal; a signal summer connected to said second and fourth signal mixers for combining said in-phase and quadrature portions of said radar estimate signal to provide said radar estimate signal; envelope detector means connected to said first and third signal mixers for detecting the in-phase and quadrature amplitude component signals; a signal summer connected to said envelope detector means for summing said in-phase and quadrature amplitude component signals; a comb filter connected to said summing means said comb filter being tuned to the repetition interval of said radar signal for passing said summed in-phase and quadrature component signals; a threshold circuit connected to said comb filter for generating a signal in response to said summed in-phase and quadrature component signals; a signal width measurer connected to said comb filter for generating a signal in response to said summed in-phase and quadrature component signals; an AND gate connected to said threshold circuit and said pulse width measurer for generating an output signal in response to said signals from said threshold circuit and pulse width measurer; a delay circuit connected to said AND gate for delaying said output signal one radar signal repetition interval; and an AND gate cOnnected to said signal summer and said delay circuit for passing said radar estimate signal in response to said delayed output signal.