Apparatus for the current limiting interruption of currents at high voltages

Claim 2

In a circuit arrangement for the current limiting interruption of direct and alternating currents at high volTages flowing in a power main having a commutation switch connected in said main, an energy absorbing high resistance circuit, and a series circuit including a capacitor, a leakage inductance and a normally open auxiliary switch means responsive to the arc voltage of said commutation switch, said energy absorbing circuit and said series circuit each being connected in parallel with said commutation switch, said capacitor being precharged so that upon opening of said commutation switch the discharge current from said capacitor will flow into said commutation switch in a direction opposite that of the current to be interrupted, said discharge current being of such magnitude that the current to be interrupted will commutate to at least said energy absorbing high resistance circuit wherein the current is reduced to a quiescent current value which is switched off by a circuit breaker subsequently connected in said main, the improvement wherein said circuit arrangement further includes circuit means for influencing the precharging of said capacitor and the capacitor discharge current path so that sufficient time is available to said commutation switch during the commutation phase to increase its arc resistance to such an extent that the current flow therein which is to be interrupted is commutated into the parallelly connected circuits and cannot commutate back into said commutation switch; and wherein said circuit means includes an additional inductance connected in series with said capacitor, said additional inductance being designed so that it delays the commutation process to the extent required for an increase in the arc resistance of said commutation switch, and means for causing said capacitor to be charged only during the commutation process.

Claim 3

The circuit arrangement defined in claim 1 wherein said circuit means includes means for charging said capacitor by the arc voltage.

Claim 4

The circuit arrangement defined in claim 2 wherein said means for charging causes said capacitor to be charged to a value dependent on the intensity of the current to be interrupted.

Claim 5

The circuit arrangement defined in claim 3 wherein said means for charging said capacitor comprises: a measuring resistor connected in series with said commutation switch and an amplifier circuit having its signal input connected across said measuring resistor and its supply voltage input connected across said commutation switch said amplifier provided the output value iq f (i, Vb) where iq is the charging current for said capacitor, i is the current to be interrupted and Vb is the arc voltage across said commutation switch.

Claim 6

The circuit arrangement defined in claim 3 wherein said auxiliary switch means comprises a pair of spark gaps, one of which is connected on each side of said capacitor, in said series circuit, and wherein said charging means comprises a pair of resistive circuit paths connecting the terminals of said capacitor across said commutation switch.

Claim 7

The circuit arrangement defined in claim 5 wherein said capacitor includes a plurality of capacitors connected in series; wherein said pair of resistive circuit paths connects the terminals of each of said capacitors in parallel across said commutation switch so as to charge each capacitor in the same polarity; and wherein an additional spark gap is connected in said series circuit between each pair of capacitors, whereby a multiplier type charging circuit is provided.

Claim 8

The circuit arrangement defined in claim 6 wherein there are n capacitors and wherein all n charging currents of the multiplier circuit have the same time constant and the capacitors are all charged, after commutation of the current to be interrupted into the parallely connected high resistance circuit branch with identical voltages.

Claim 9

The circuit arrangement defined in claim 6 wherein the charge time constants of said charging means are dimensioned so that the capacitors are sufficiently charged in a few milLiseconds before the commutation of the current to be interrupted occurs and during the duration of the arc formed by the opening of said commutation switch.

Claim 10

The circuit arrangement defined in claim 6 wherein said spark gaps are of sufficient size so that they can carry a current of from several hundred to one thousand amperes for several tens of milliseconds, and wherein the charging resistances in said resistive paths are dimensioned so that they simultaneously serve as energy absorbers.

Claim 11

In a circuit arrangement for the current limiting interruption of direct and alternating currents at high voltages flowing in a power main having a commutation switch connected in said main, an energy absorbing high resistance circuit, and a series circuit including a capacitor, a leakage inductance and a normally open auxiliary switch means responsive to the arc voltage of said commutation switch, said energy absorbing circuit and said series circuit each being connected in parallel with said commutation switch, said capacitor being precharged so that upon opening of said commutation switch the discharge current from said capacitor will flow into said commutation switch in a direction opposite that of the current to be interrupted, said discharge current being of such magnitude that the current to be interrupted will commutate to at least said energy absorbing high resistance circuit wherein the current is reduced to a quiescent current value which is switched off by a circuit breaker subsequently connected in said main, the improvement wherein said circuit arrangement further includes circuit means for influencing the precharging of said capacitor and the capacitor discharge current path so that sufficient time is available to said commutation switch during the commutation phase to increase its arc resistance to such an extent that the current flowing therein which is to be interrupted is commutated into the parallelly connected circuits and cannot commutate back into said commutation switch; wherein said circuit means includes a further commutation switch connected in series with said first mentioned commutation switch and a series circuit, including a further capacitor and a further auxiliary switch means responsive to the arc voltage across said further commutation switch, connected across said further commutation switch, said further capacitor having a large capacitance but a low rated voltage; wherein said first mentioned capacitor has a low capacitance but a high rated voltage; and wherein said series circuit and said energy absorbing circuit are connected in parallel with the series connection of said commutation switches, whereby a discharge current flowing through said first mentioned capacitor after the arc has been quenched in said further commutation switch effects a zero current flow through said first mentioned commutation switch causing commutation of the current to be interrupted to said energy absorbing high resistance circuit.

Claim 12

In a circuit arrangement for the current limiting interruption of direct and alternating currents at high voltages flowing in a power main having a commutation switch connected in said main, an energy absorbing high resistance circuit, and a series circuit including a capacitor, a leakage inductance and a normally open auxiliary switch means responsive to the arc voltage of said commutation switch, said energy absorbing circuit and said series circuit each being connected in parallel with said commutation switch, said capacitor being precharged so that upon opening of said commutation switch the discharge current from said capacitor will flow into said commutation switch in a direction opposite that of the current to be interrupted, said discharge current being of such magnitude that the current to be interrupted will commutate to at least said energy absorbing high resistance circuit wherein the current is reduced to a quiescent current value which is switched off by a circuit breaker subsequently connected in said main, the improvement wherein said circuit arrangement further includes circuit means for influencing the precharging of said capacitor and the capacitor discharge current path so that sufficient time is available to said commutation switch during the commutation phase to increase its arc resistance to such an extent that the current flowing therein which is to be interrupted is commutated into the parallelly connected circuits and cannot commutate back into said commutation switch; wherein said circuit means includes a further commutation switch connected in series with said first mentioned commutation switch and a series circuit, including a further capacitor and a further auxiliary switch means responsive to the arc voltage across said further commutation switch, connected across said further commutation switch, said further capacitor having a large capacitance but a low rated voltage; wherein said first mentioned capacitor has a low capacitance but a high rated voltage; and wherein said series circuit and said energy absorbing circuit are connected in parallel with the series connection of said commutation switches, whereby a discharge current flowing through said first mentioned capacitor after the arc has been quenched in said further commutation switch effects a zero current flow through said first mentioned commutation switch causing commutation of the current to be interrupted to said energy absorbing high resistance circuit.