Claims Analysis
Total Claims: 7
Claim 1
Independent Claim
300 words
An amplifier of controllable A.C. signal gain comprising: a. a first and a second pair of transistors in an upper rank, the emitters of each transistor pair being joined; one collector of a transistor in each pair being joined and coupled to a source of D.C. bias potential, and the collector of the other transistor in each pair being joined and coupled through a common load impedance to a source of D.C. bias potentials, b. a lower rank transistor pair having its emitters paired and led to a current source for mutually complemented signal coupling, the collector of each lower rank transistor being connected to contRol the emitter current in one upper rank transistor pair; c. means coupling an A.C. input signal to the base of a first lower rank transistor, said coupling means having a high pass characteristic and presenting a complex input impedance to said base, said lower rank transistors forming mutually complemented signals in the emitter current of each upper rank transistor pair, d. means for applying a D.C. interbase control potential to each upper rank transistor pair, balanced at said collector load impedance, for adjusting the relative proportions of said complemented signals in the composite signal in said load, e. means for coupling said composite signal to both bases of said lower rank transistors in a feedback network which is symmetrical from a D.C. standpoint to provide negligible interbase potential and which from an A.C. standpoint is nonsymmetrical at signal frequencies, as a result of imbalance by said complex input impedance, to provide substantial interbase feedback potential, the amount and phase thereof being adjustable by said interbase control potential, and f. output means coupled between like input electrodes of said lower rank transistor pair for deriving an output signal whose amplitude reflects said interbase control potential.
Claim 2
Dependent Claim
300 words
An amplifier of controllable A.C. signal gain comprising: a. a first and a second pair of transistors in an upper rank, the emitters of each transistor pair being joined; one collector of a transistor in each pair being joined and coupled to a source of D.C. bias potential, and the collector of the other transistor in each pair being joined and coupled through a common load impedance to a source of D.C. bias potentials, b. a lower rank transistor pair having its emitters paired and led to a current source for mutually complemented signal coupling, the collector of each lower rank transistor being connected to contRol the emitter current in one upper rank transistor pair; c. means coupling an A.C. input signal to the base of a first lower rank transistor, said coupling means having a high pass characteristic and presenting a complex input impedance to said base, said lower rank transistors forming mutually complemented signals in the emitter current of each upper rank transistor pair, d. means for applying a D.C. interbase control potential to each upper rank transistor pair, balanced at said collector load impedance, for adjusting the relative proportions of said complemented signals in the composite signal in said load, e. means for coupling said composite signal to both bases of said lower rank transistors in a feedback network which is symmetrical from a D.C. standpoint to provide negligible interbase potential and which from an A.C. standpoint is nonsymmetrical at signal frequencies, as a result of imbalance by said complex input impedance, to provide substantial interbase feedback potential, the amount and phase thereof being adjustable by said interbase control potential, and f. output means coupled between like input electrodes of said lower rank transistor pair for deriving an output signal whose amplitude reflects said interbase control potential.
Claim 3
Dependent Claim
42 words
An amplifier as set forth in claim 1 wherein said high pass coupling means comprises a serially connected capacitance (Cs) and resistance coupling said input signal to the base of said first transistor and presenting a low pass characteristic to said feedback.
Claim 4
Dependent Claim
43 words
An amplifier as set forth in claim 2 wherein said feedback network comprises an emitter follower whose base is coupled to said common load impedance and whose emitter is coupled to each lower rank transistor base through a like valued serial feedback resistance.
Claim 5
Dependent Claim
51 words
An amplifier as set forth in claim 3 wherein a pair of emitter followers is provided for coupling the feedback signal available through said serial feedback resistances to the bases of said lower rank transistors, and wherein said output means are coupled between the bases of said lower rank transistor pair.
Claim 6
Dependent Claim
66 words
An amplifier as set forth in claim 4 wherein the forward gain (A(o)) of said amplifier calculated between the base of said first lower rank transistor and the emitter of said emitter follower is less than one (1) plus the ratio of said serial signal resistance (Rs) and the internal source resistance (Ris) to said serial feedback resistance (Rf) Ao < (1 + Rs + Ris/Rf).
Claim 7
Dependent Claim
79 words
An amplifier as set forth in claim 5 wherein the geometric means of the cut off frequency of the amplifier ( omega o) and the cut off frequency of said feedback network ( omega i) approximates the center signal frequency, the cut off frequency of said feedback network being defined as: omega i 1/Cs (Rs + Ris + Rf) to cause the amplifier to have a frequency selective characteristic peaking at said center signal frequency at maximum gain condition.