Patent US3749894A successfully refreshed from Google Patents.
US3749894A
Expired / Lapsed
US
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Analog to digital conversion and computation method
Assignee: Individual
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Filing: 1971-03-19
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Granted: 1973-07-31
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Expires: 1991-03-19
Abstract
Abstract A method of multiplying or taking reciprocals of electrical analog quantities and converting the result to digital form. It is based on the known up/down or dual-ramp method of analog/digital conversion, which digitizes the ratio of an analog input to a reference input. The invention obtains reciprocals by inverting the order of the input and the reference, and obtains the product of two inputs with the aid of two integrator channels and an extra conversion step. The method is accurate and may be practiced with simpler apparatus than previous methods.
Inventors
- 👤 R Avdeef
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-03 19:46
CPC Classifications
G; G06; G06J; G06J1/00; H; H03; H03M; H03M1/00; H03M1/12; H03M1/50; H03M1/52
Claims Analysis
Total Claims: 4
Claim 1
Independent Claim
210 words
A method of electronic machine computation, comprising the following steps: integrating a first signal proportional to a first input quantity in a first integrator over a predetermined first time period to produce a first integrator output level; integrating a second signal proportional to a second input quantity and of polarity opposite to said first signal in said first integrator, starting back from said first integrator output level at the end of said first time period, the time integral of said second signal reaching a predetermined zero level in a first readout time inversely proportional to said second signal; measuring the length of said first readout time period, said length being proportional to an inverse function of said second signal; integrating a third signal in a second integrator simultaneously with the integration of said second signal in said first integrator; and integrating said second signal again in said second integrator, beginning with the end of said first Readout period and ending when the integral reaches said predetermined zero level, the duration of this integration being a second readout period, said first and third signals being separate unknowns, said second signal being a known reference voltage, and the duration of said second readout period being proportional to the product of said unknowns.
Claim 2
Independent Claim
210 words
A method of electronic machine computation, comprising the following steps: integrating a first signal proportional to a first input quantity in a first integrator over a predetermined first time period to produce a first integrator output level; integrating a second signal proportional to a second input quantity and of polarity opposite to said first signal in said first integrator, starting back from said first integrator output level at the end of said first time period, the time integral of said second signal reaching a predetermined zero level in a first readout time inversely proportional to said second signal; measuring the length of said first readout time period, said length being proportional to an inverse function of said second signal; integrating a third signal in a second integrator simultaneously with the integration of said second signal in said first integrator; and integrating said second signal again in said second integrator, beginning with the end of said first Readout period and ending when the integral reaches said predetermined zero level, the duration of this integration being a second readout period, said first and third signals being separate unknowns, said second signal being a known reference voltage, and the duration of said second readout period being proportional to the product of said unknowns.
Claim 3
Dependent Claim
45 words
The method of claim 1, wherein: said second readout period is measured with a clocked counter, said counter being reset to zero at the end of said first readout period and its count transferred to a register at the end of said second readout period.
Claim 4
Dependent Claim
42 words
The method of claim 2, comprising the following additional step: sensing whether the time integral of said said second signal reaches said predetermined zero level in either said second or said third period, and if it does not, actuating overrange indicating means.
References Cited (Backward Citations)
US3462758A
Cited
US3582947A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1976-07-30 | 1977-01-29 | 1977-07-31 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1980-07-30 | 1981-01-29 | 1981-07-31 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1984-07-30 | 1985-01-29 | 1985-07-31 | $7700.00 | Window Closed / Lapsed |