Patent US3748726A successfully refreshed from Google Patents.
US3748726A
Expired / Lapsed
US
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Method for mounting semiconductor components
Assignee: Siemens AG
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Filing: 1970-09-18
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Granted: 1973-07-31
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Expires: 1990-09-18
Abstract
Abstract A method for connecting an integrated circuit with outside electric leads where the integrated circuit is inserted into an insulating substrate with thereon-situated electrical conductor paths and an electrical connection is produced between the conductor paths on the substrate and the integrated circuit. The method of the invention is to bore a hole into the substrate constituting a non-etchable insulating material. The hole is filled in with an etchable material. Conductor paths are placed upon said substrate, so that the conductor paths projects beyond the edge of the hole, filled with the etchable material. The etchable material is then etched from the hole, the integrated circuit inserted into said hole and the ends of the conductor paths which project above the edge of the hole, are electrically connected with the integrated circuit.
Inventors
- 👤 R Wiesner
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-30 15:07
CPC Classifications
H; H10; H10W; H10W70/00; H10W70/099; H10W40/00; H10W40/70; H10W40/77; H10W40/778; H10W70/40; H10W70/421; H10W70/435; H10W74/00; H10W74/10; H10W74/111; H10W70/01; H10W70/05; H10W70/08; H10W70/09; H10W70/60; H10W72/00; H10W72/071; H10W72/072; H10W72/07231; H10W72/07236; H10W72/90; H10W72/941; H10W72/9413; Y; Y10; Y10T; Y10T29/00; Y10T29/49; Y10T29/49002; Y10T29/49117; Y10T29/49124; Y10T29/4913
Claims Analysis
Total Claims: 5
Claim 1
Independent Claim
149 words
A method for connecting an integrated circuit with outside electric leads where the integrated circuit is inserted into an insulating substrate with thereon situated electrical conductor paths and an electrical connection is produced between the conductor paths on the substrate and the integrated circuit; which comprises boring a hole in a substrate consisting of a nonetchable insulating material, filling said hole in with an etchable material, placing conductor paths upon said substrate so that an end of each of said conductor paths projects beyond the edge of the hole filled with said etchable material, etching away said etchable material from the hole whereby the projecting ends of the conductor paths protrude freely in an unsupported manner beyond the edge of the hole, inserting an integrated circuit into said hole and electrically connecting ends of the conductor paths which project beyond the edge of the hole with the integrated circuit.
Claim 2
Independent Claim
149 words
A method for connecting an integrated circuit with outside electric leads where the integrated circuit is inserted into an insulating substrate with thereon situated electrical conductor paths and an electrical connection is produced between the conductor paths on the substrate and the integrated circuit; which comprises boring a hole in a substrate consisting of a nonetchable insulating material, filling said hole in with an etchable material, placing conductor paths upon said substrate so that an end of each of said conductor paths projects beyond the edge of the hole filled with said etchable material, etching away said etchable material from the hole whereby the projecting ends of the conductor paths protrude freely in an unsupported manner beyond the edge of the hole, inserting an integrated circuit into said hole and electrically connecting ends of the conductor paths which project beyond the edge of the hole with the integrated circuit.
Claim 3
Dependent Claim
15 words
The method of claim 1, whErein oxide ceramic is used as the non-etchable insulating substrate.
Claim 4
Dependent Claim
34 words
The method of claim 1, wherein the insulating substrate with the installed circuit that is connected with the conductor paths projecting beyond the edge of the hole, is enclosed by a heat conducting insulator.
Claim 5
Dependent Claim
24 words
The method of claim 1, wherein an electrically insulating plate which provides good thermal conductivity is pasted upon the substrate containing the conductor paths.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1976-07-30 | 1977-01-29 | 1977-07-31 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1980-07-30 | 1981-01-29 | 1981-07-31 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1984-07-30 | 1985-01-29 | 1985-07-31 | $7700.00 | Window Closed / Lapsed |