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US3748587A Expired / Lapsed US ⏱️ 0.0 years remaining

Continuous amplifier assembly with drift correction

Assignee: Sercel SAS
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Filing: 1972-04-21
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Granted: 1973-07-24
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Expires: 1992-04-21
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Abstract

Abstract An amplifier assembly for amplifying weak DC signals and having means for drift correction. The assembly includes commutating devices for causing it to operate cyclicly in two distinct operating modes, alternately of short and long duration. In the short sampling modes when the assembly input is zero, the drift of a first amplifier stage is sampled and stored in a memory and the assembly output is disconnected from the load. During the longer alternate modes when the DC input is applied to the first amplifier stage, the assembly output is connected to the load, the previously stored signal is supplied as a drift correction signal to one input of a differential input amplifier stage, and the other differential stage input is connected to the first stage output. The output of the differential amplifier stage yields the final output from the assembly; when such output is disconnected from the load during the short sampling modes, the value thereof is maintained across the load from a second memory charged from the assembly output during the previous longer mode.

Inventors

  • 👤 M Aumiaux

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-24 21:53
CPC Classifications
H; H03; H03F; H03F3/00; H03F3/45; H03F3/45071; H03F3/45479; H03F1/00; H03F1/30; H03F1/302; H03F1/303; H03F1/306; H03F3/38; H03F3/387

Claims Analysis

Total Claims: 7
Claim 1
Independent Claim 314 words
A drift compensated amplifier assembly for weak DC voltage signals comprising a DC amplifier and drift correcting means, said DC amplifier comprising a first high voltage gain differential amplifier stage with a first input for said DC signals and a second input, and a second amplifier stage having differential first and second inputs, the first input of said second amplifier stage being connected to the output of said first amplifier stage; said drift correcting means comprising an analogue memory, a first gating circuit connected to said first amplifier stage output and to said memory for enabling the storing of a voltage from said output of said first amplifier stage in said analogue memory, a second gating circuit connected to said memory and to the second input of said second amplifier stage for enabling supply of the memory stored voltage to said second input of said second amplifier stage, a third gating circuit connecting said first input of said first amplifier stage to ground thereby enabling a zero input voltage, and a fourth gating circuit connected between the output of the DC amplifier and the second input of the first amplifier stage for establishing a negative feedback connection; and control means for synchronously controlling said gating circuits cyclicly, said control means operating said first gating circuit for storing in said memory a voltage sampled out of the signal at said output of said first amplifier stage while simultaneously operating said third gating circuit to maintain the input of said first amplifier stage at zero voltage, thus providing a memorized drift correction voltage, and thereafter operating said second gating circuit for causing the voltage at said second input of said second amplifier stage to be said memorized drift correction voltage while simultaneously operating said fourth gating circuit for establishing said negative feedback connection until the next sampling when said first amplifier stage input is again zero.
Claim 2
Dependent Claim 314 words
A drift compensated amplifier assembly for weak DC voltage signals comprising a DC amplifier and drift correcting means, said DC amplifier comprising a first high voltage gain differential amplifier stage with a first input for said DC signals and a second input, and a second amplifier stage having differential first and second inputs, the first input of said second amplifier stage being connected to the output of said first amplifier stage; said drift correcting means comprising an analogue memory, a first gating circuit connected to said first amplifier stage output and to said memory for enabling the storing of a voltage from said output of said first amplifier stage in said analogue memory, a second gating circuit connected to said memory and to the second input of said second amplifier stage for enabling supply of the memory stored voltage to said second input of said second amplifier stage, a third gating circuit connecting said first input of said first amplifier stage to ground thereby enabling a zero input voltage, and a fourth gating circuit connected between the output of the DC amplifier and the second input of the first amplifier stage for establishing a negative feedback connection; and control means for synchronously controlling said gating circuits cyclicly, said control means operating said first gating circuit for storing in said memory a voltage sampled out of the signal at said output of said first amplifier stage while simultaneously operating said third gating circuit to maintain the input of said first amplifier stage at zero voltage, thus providing a memorized drift correction voltage, and thereafter operating said second gating circuit for causing the voltage at said second input of said second amplifier stage to be said memorized drift correction voltage while simultaneously operating said fourth gating circuit for establishing said negative feedback connection until the next sampling when said first amplifier stage input is again zero.
Claim 3
Dependent Claim 15 words
An amplifier assembly according to claim 1 in which said analogue memory comprises a capacitor.
Claim 4
Dependent Claim 27 words
An amplifier assembly according to claim 2 in which at least one of said gating circuits consists of a high input impedance amplifier of essentially unit gain.
Claim 5
Dependent Claim 19 words
An amplifier assembly according to claim 1 in which said gating circuits comprise electronic devices having no moving parts.
Claim 6
Dependent Claim 16 words
An amplifier assembly according to claim 4 in which said electronic devices are field effect transistors.
Claim 7
Dependent Claim 164 words
An amplifier assembly according to claim 1 further comprising an output terminal for said amplifier assembly and an output terminal for said DC amplifier, a fifth gating circuit connected in series between said output terminals, said control means operating said fifth gating circuit for connecting said output terminals while a DC input is applied to said first input of said first amplifier stage and for disconnecting said output terminals while a zero input is applied to said first input of said first amplifier stage, and output voltage maintaining means, said output voltage maintaining means comprising an analogue memory, a sixth gating circuit operated by said control means for storing the output voltage of said DC amplifier in said last named memory when said output terminals are connected, and a seventh gating circuit operated by said control means for supplying the stored voltage in said last named memory to the amplifier assembly output terminal during the zero inPut sampling when said output terminals are disconnected.

References Cited (Backward Citations)

US2994825A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1976-07-23 1977-01-22 1977-07-24 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1980-07-23 1981-01-22 1981-07-24 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1984-07-23 1985-01-22 1985-07-24 $7700.00 Window Closed / Lapsed

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