Patent US3747073A successfully refreshed from Google Patents.
US3747073A
Expired / Lapsed
US
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Electrical display devices
Assignee: US Philips Corp
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Filing: 1972-03-16
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Granted: 1973-07-17
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Expires: 1992-03-16
Abstract
Abstract An addressing circuit arrangement for an electrical display device comprising a two-dimensional matrix of light-emitting elements which are connected at respective crosspoints formed by two groups of row and column conductors and each of which can be illuminated selectively by suitable energizing signals applied contemporaneously to the two conductors, one in each group, between which the element is connected. The arrangement includes, a circulation memory for storing character data in respect of a plurality of lines of characters to be displayed and for supplying in turn the character data for each line of characters serially character by character in a recurrent cycle, a character generator which is responsive to the supplied data for each character to produce a group of coded electrical signals that determine the discrete parts of the character to be displayed in the row of elements concerned, and a row store for storing in each fill period of each row period the several groups of coded electrical signals for the whole of the row of elements concerned.
Inventors
- 👤 G Sharpless
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-23 11:19
CPC Classifications
G; G09; G09G; G09G3/00; G09G3/20; G09G3/22; G09G3/28; G09G3/282; G09G5/00; G09G5/22; G09G5/222; G09G2310/00; G09G2310/02; G09G2310/0264; G09G2310/0267; G09G2310/0275; G09G2310/0283; G09G3/04; G09G3/06; G09G3/10
Claims Analysis
Total Claims: 13
Claim 1
Independent Claim
193 words
An addressing circuit arrangement for an electrical display device, which arrangement includes, a circulation memory for storing character data of a plurality of lines for characters to be displayed and for supplying in turn the character data for each line of characters serially, character by character, in a recurrent cycle, a character generator connected to said circulation memory which is responsive to the supplied data for each character to produce a group of coded electrical signals that determine the discrete parts of the character to be displayed in a row of elements concerned, and a row store connected to said character generator for storing in each fill period of each row period the several groups of coded electrical signals for the whole of the row of elements concerned, a cycle period of the circulation memory being different from the row period such that for a given order of storage of the character data for the several lines of characters in the circulation memory, the data for each line of characters is supplied in the fill period of every nth row period, where n is the number of lines of characters to be displayed.
Claim 2
Dependent Claim
193 words
An addressing circuit arrangement for an electrical display device, which arrangement includes, a circulation memory for storing character data of a plurality of lines for characters to be displayed and for supplying in turn the character data for each line of characters serially, character by character, in a recurrent cycle, a character generator connected to said circulation memory which is responsive to the supplied data for each character to produce a group of coded electrical signals that determine the discrete parts of the character to be displayed in a row of elements concerned, and a row store connected to said character generator for storing in each fill period of each row period the several groups of coded electrical signals for the whole of the row of elements concerned, a cycle period of the circulation memory being different from the row period such that for a given order of storage of the character data for the several lines of characters in the circulation memory, the data for each line of characters is supplied in the fill period of every nth row period, where n is the number of lines of characters to be displayed.
Claim 3
Dependent Claim
99 words
An addressing circuit arrangement as claimed in claim 1, further comprising means connected to said character generator for controlling the character data such that for a chosen percentage of the row period (Tr) to be occupied by the fill period (Tf), the character data for each line of characters occupies a period which is the same as the fill period in the cycle period of the circulation memory, and this cycle period is Tr/Tf X n (Tf), provided that the ratio Tr/Tf is not equal to n, and that there is no common factor of both Tr/Tf and n.
Claim 4
Dependent Claim
20 words
An addressing circuit arrangement as claimed in claim 2, wherein said chosen percentage is 20 percent so that Tr/Tf 5.
Claim 5
Dependent Claim
13 words
An addressing circuit arrangement as claimed in claim 2, wherein Tr/Tf > n.
Claim 6
Dependent Claim
13 words
An addressing circuit arrangement as claimed in claim 2, wherein Tr/Tf < n.
Claim 7
Dependent Claim
18 words
An addressing circuit arrangement as claimed in claim 3, wherein n 4, so that Tr/Tf n + 1.
Claim 8
Dependent Claim
18 words
An addressing circuit arrangement as claimed in claim 3, wherein n 8, so that Tr/Tf n - 3.
Claim 9
Dependent Claim
176 words
An addressing circuit arrangement as claimed in claim 1, wherein the circuit arrangement further includes a sub-matrix row scanner for providing element row energizing signals in a required sequence, which sub-matrix row scanner comprises a two-dimensional matrix of driver circuits which are arranged in n rows of m columns, where m is the number of columns of elements which make up a character line, each of said driver circuits being operable selectively to produce an element row energizing signal in response to the coincidence there at of two enable signals, one from a line decoder which provides n enable signals in a recurrent cycle, and the other from a row decoder which provides m enable signals in a recurrent cycle, means for driving said line and row decoders synchronously to produce their respective enable signals successively for successive row periods, and a counter connected to said character generator and said row decoder for controlling the signals supplied from said character generator to said row store in synchronism with the enable signals supplied by said row decoder.
Claim 10
Dependent Claim
12 words
An addressing circuit arrangement as claimed in claim 8, wherein m 7.
Claim 11
Dependent Claim
28 words
An addressing circuit arrangement according to claim 8, further comprising an electrical display device connected to said row scanner responsive to the energized signals for displaying said characters.
Claim 12
Dependent Claim
18 words
The combination according to claim 10, wherein the electrical display device comprises a matrix of glow discharge cells.
Claim 13
Dependent Claim
29 words
The combination as claimed in claim 11, further comprising means disposed in said circuit for operating said display device at a field rate between 50 Hz and 500 Hz.
References Cited (Backward Citations)
US2581290A
Cited
US3686661A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1976-07-16 | 1977-01-15 | 1977-07-17 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1980-07-16 | 1981-01-15 | 1981-07-17 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1984-07-16 | 1985-01-15 | 1985-07-17 | $7700.00 | Window Closed / Lapsed |