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US3746994A
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Apparatus for determining the validity of data received by data
Assignee: Datel Corp
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Filing: 1971-03-11
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Granted: 1973-07-17
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Expires: 1991-03-11
Abstract
Abstract A data transmission apparatus has modulating and demodulating circuitry for transmitting data between transmission lines and data terminals. The demodulating circuitry includes a phase lock discriminator loop which converts logic signals of first and second discrete frequencies into DC logic signals. The phase lock discriminator loop includes a voltage controlled oscillator (VCO) and is operable to lock on and track a single frequency signal. The VCO is operable when the loop is locked on to an incoming frequency, such as one or the other of the logic signals at discrete frequencies, to generate an output at the incoming frequency with a phase displacement of 90* . A phase shift circuit receives the VCO output and phase shifts the output 90* into phase with the incoming discrete frequency. A carrier detector senses the electrical signals transmitted to the discriminator loop and ANDS the phase shifted VCO output with the electrical signals transmitted to the discriminator loop. Thereby, pulses are generated which are a measure of the validity of received data since the 90* phase relationship between the VCO output and the incoming signal degenerates if the incoming signal is noise or currupted with noise. A pulse averaging circuit generates an enabling signal to indicate valid data when the pulse average as a function of time exceeds a minimum level. In another embodiment the carrier detector is enabled in order to permit the generation of the enabling signal.
Inventors
- 👤 M Kramer
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-25 14:46
CPC Classifications
H; H04; H04L; H04L27/00; H04L27/10; H04L1/00; H04L1/20
Claims Analysis
Total Claims: 10
Claim 1
Independent Claim
257 words
In a data transmission apparatus wherein binary data in the form of electrical signals at two discrete frequency levels representing the binary data are received and converted into DC logic signals by a phase lock discriminator loop which includes a voltage controlled oscillator driven by the output of the phase lock discriminator loop to phase lock onto the electrical signals at the two discrete frequency levels received by the discriminator loop with a predetermined phase displacement, the improvement comprising: phase shifting means connected to receive the output of said voltage controlled oscillator, said phase shifting means being operable to phase shift the received output signal of said oscillator a predetermined amount substantially equal to the predetermined phase displacement between electrical signals at said discrete frequency levels and the electrical output signal of said phase locked voltage controlled oscillator; AND means connected to sense the electrical signals received by said discriminator loop and connected to receive the phase shifted output signal of said oscillator, said circuit means being operable to AND said electrical signals sensed with the phase shifted output signal of said oscillator whereby to generate a pulsed output which is a measure of the validity of data received by said discriminator loop; and pulse averaging means connected to said circuit means to receive said pulsed output, said pulse averaging means being operable to average said pulsed output as a function of time and generate an enabling signal which indicates the presence of valid data whenever the average of said pulsed output exceeds a predetermined minimum level.
Claim 2
Dependent Claim
257 words
In a data transmission apparatus wherein binary data in the form of electrical signals at two discrete frequency levels representing the binary data are received and converted into DC logic signals by a phase lock discriminator loop which includes a voltage controlled oscillator driven by the output of the phase lock discriminator loop to phase lock onto the electrical signals at the two discrete frequency levels received by the discriminator loop with a predetermined phase displacement, the improvement comprising: phase shifting means connected to receive the output of said voltage controlled oscillator, said phase shifting means being operable to phase shift the received output signal of said oscillator a predetermined amount substantially equal to the predetermined phase displacement between electrical signals at said discrete frequency levels and the electrical output signal of said phase locked voltage controlled oscillator; AND means connected to sense the electrical signals received by said discriminator loop and connected to receive the phase shifted output signal of said oscillator, said circuit means being operable to AND said electrical signals sensed with the phase shifted output signal of said oscillator whereby to generate a pulsed output which is a measure of the validity of data received by said discriminator loop; and pulse averaging means connected to said circuit means to receive said pulsed output, said pulse averaging means being operable to average said pulsed output as a function of time and generate an enabling signal which indicates the presence of valid data whenever the average of said pulsed output exceeds a predetermined minimum level.
Claim 3
Dependent Claim
46 words
The invention recited in claim 1, Including means for enabling said data transmission apparatus, said enabling means being responsive to said enabling signal generated by said pulse averaging means whereby to only enable said data transmission apparatus whenever said pulse averaging means generates said enabling signal.
Claim 4
Dependent Claim
36 words
The invention recited in claim 1, including first means for selectively enabling said pulse averaging means whereby said pulse averaging means is only operable to generate said enabling signal whenever enabled by said first enabling means.
Claim 5
Dependent Claim
48 words
The invention recited in claim 3, including second means for enabling said data transmission apparatus, said second enabling means being responsive to said enabling signal generated by said pulse averaging means whereby to only enable said data transmission apparatus whenever said pulse averaging means generates said enabling signal.
Claim 6
Dependent Claim
77 words
The invention recited in claim 4, wherein said AND means includes a pair of transistors having their emitter-collector electrode paths connected in series so that electrical signals applied to the bases of said transistors are ANDED thereby, the base of one of said transistors being connected to sense the electrical signals received by said discriminator loop and the base of the other of said transistors being connected to receive the phase shifted output signal of said oscillator.
Claim 7
Dependent Claim
77 words
The invention recited in claim 1, wherein said AND means includes a pair of transistors having their emitter-collector electrode paths connected in series so that electrical signals applied to the bases of said transistors are ANDED thereby, the base of one of said transistors being connected to sense the electrical signals received by said discriminator loop and the base of the other of said transistors being connected to receive the phase shifted output signal of said oscillator.
Claim 8
Dependent Claim
47 words
The invention recited in claim 1, including a bandpass filter means in said data transmission apparatus for filtering received electrical signals and transmitting the filtered signals to said discriminator loop, said bandpass filter means being operable to transmit electrical signals at said first and second discrete frequencies.
Claim 9
Dependent Claim
198 words
Apparatus for determining the validity of binary data received by a data transmission apparatus where valid binary data is characterized by electrical signals at two discrete frequency levels representing the binary data, said apparatus comprising: means for generating a first electrical signal which corresponds in frequency to the discrete frequency of received data and is phased displaced a predetermined amount therefrom; means for phase shifting said first electrical signal a predetermined amount substantially equal to the predetermined phase displacement between the discrete frequency of said received data and said first electrical signal; AND means for ANDING said phase shifted first electrical signal with said received data signal whereby to produce a pulsed output signal which is a measure of the validity of received data, said AND means including a pair of transistors having their emitter-collector electrode paths connected in series to AND together said phase shifted first electrical signal with said received data signal to generate said output signal; and a pulse averaging circuit for averaging said pulsed output as a function of time and generating an enabling signal which indicates the presence of valid data whenever the average of said pulsed output exceeds a predetermined minimum level.
Claim 10
Dependent Claim
198 words
Apparatus for determining the validity of binary data received by a data transmission apparatus where valid binary data is characterized by electrical signals at two discrete frequency levels representing the binary data, said apparatus comprising: means for generating a first electrical signal which corresponds in frequency to the discrete frequency of received data and is phased displaced a predetermined amount therefrom; means for phase shifting said first electrical signal a predetermined amount substantially equal to the predetermined phase displacement between the discrete frequency of said received data and said first electrical signal; AND means for ANDING said phase shifted first electrical signal with said received data signal whereby to produce a pulsed output signal which is a measure of the validity of received data, said AND means including a pair of transistors having their emitter-collector electrode paths connected in series to AND together said phase shifted first electrical signal with said received data signal to generate said output signal; and a pulse averaging circuit for averaging said pulsed output as a function of time and generating an enabling signal which indicates the presence of valid data whenever the average of said pulsed output exceeds a predetermined minimum level.
References Cited (Backward Citations)
US3440540A
Cited
US3457512A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1976-07-16 | 1977-01-15 | 1977-07-17 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1980-07-16 | 1981-01-15 | 1981-07-17 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1984-07-16 | 1985-01-15 | 1985-07-17 | $7700.00 | Window Closed / Lapsed |