Method and apparatus for determining certain accelerations in an antiskid system

Claim 3

A method according to claim 1, wherein said step of counting said first impulses in an upward direction in one measuring cycle and said step of counting said first impulses in a downward direction in a previous adjacent measuring cycle occurs simultaneously, and said step of counting said second impulses in an upward direction in one measuring cycle and said step of counting said second impulse in a downward direction in a previous measuring cycle occurs simultaneously

Claim 4

A method according to claim 2, wherein said step of counting said second impulses in a downward-direction includes the step of suppressing a given number of said second impulses when said step of counting said first impulses in a downward direction is between two given counting values so as to retard said step of counting said second impulses in a downward direction.

Claim 5

A method according to claim 3, wherein said two given counting values are one and zero.

Claim 6

A method according to claim 1, wherein said step of counting said second impulses in a downward direction includes the step of suppressing a given number of said second impulses when said step of counting said first impulses in a downward direction is between two given counting values so as to retard said step of counting said second impulses in a downward direction.

Claim 7

A method according to claim 5, wherein said two given counting values are one and zero.

Claim 8

A method according to claim 1, wherein said step of counting said second impulses in an upward direction until said first of said first impulses after said first given counting value has been reached results in a surplus of counting values, and further including the step of suppressing a given number of said second impulses at the beginning of said step of counting said second impulses in a downward direction to compensate for said surplus of counting values.

Claim 9

A method according to claim 7, wherein said step of suppressing is varied dependent upon the amount of said surplus of counting values.

Claim 10

A method according to claim 8, werein said step of suppressing is accomplished in several different stages determined by said amount of said surplus of counting values.

Claim 11

An arrangement for the determination of certain accelerations of at least one wheel of vehicular wheels controlled by an antiskid system comprising: a first source of first impulses proportional to the speed of said one wheel of said vehicular wheels; a second source of second impulses proportional to a predetermined constant frequency; first means coupled to said first source to count said first impulses in an upward direction until a first given counting value is reached and to count said first impulse in a downward direction upon occurrence of a first of said first impulses after said first given counting value has been reacHed; second means coupled to said second source and said first means to count said second impulses in an upward direction until said first given counting value is reached and to count said second impulses in a downward direction, under the influence of said first means counting in a downward direction, upon occurrence of said first of said first impulses after said first given counting value has been reached; and third means coupled to said first and second means to determine from the relative counting values of said first and second means during counting in the downward direction with respect to a second given counting value different than said first given counting value said certain accelerations.

Claim 12

An arrangement for the determination of certain accelerations of at least one wheel of vehicular wheels controlled by an antiskid system comprising: a first source of first impulses proportional to the speed of said one wheel of said vehicular wheels; a second source of second impulses proportional to a predetermined constant frequency; first means coupled to said first source to count said first impulses in an upward direction until a first given counting value is reached and to count said first impulse in a downward direction upon occurrence of a first of said first impulses after said first given counting value has been reacHed; second means coupled to said second source and said first means to count said second impulses in an upward direction until said first given counting value is reached and to count said second impulses in a downward direction, under the influence of said first means counting in a downward direction, upon occurrence of said first of said first impulses after said first given counting value has been reached; and third means coupled to said first and second means to determine from the relative counting values of said first and second means during counting in the downward direction with respect to a second given counting value different than said first given counting value said certain accelerations.

Claim 13

An arrangement according to claim 10, wherein said first means includes a first up-counter coupled to said first source to count said first impulses until said first given counting value is reached, a first down-counter coupled to said first source to count said first impulses upon occurence of a first of said first impulses after said first given counting value have been reached, and first logic circuitry coupled between said first upcounter and said first down-counter to transfer the count of said first up-counter to said first down-counter upon occurrence of said first of said first impulses after said first given counting value has been reached; and said second means includes a second up-counter coupled to said second source to count said second impulses until said first given counting value is reached, a second down-counter coupled to said second source to count said second impulses upon occurrence of a first of said first impulses after said first given counting value has been reached, and second logic circuitry coupled between said second upcounter and said second down-counter to transfer the count of said second up-counter to said second down-counter upon occurrence of said first of said first impulses after said first given counting value has been reached.

Claim 14

An arrangement according to claim 11, wherein said third means includes third logic circuitry coupled to the last stage of said first down-counter and to the last stage of said second downcounter to produce signals indicative of said certain accelerations.

Claim 15

An arrangement according to claim 12, wherein each of said first and second down-counters includes a different predetermined number of cascade connected flips flops; and said third logic circuitry is coupled to the last flip flop of each of said first and second down-counter and produces a binary ''''1'''' output signal therefrom when the count of said second down-counter becomes zero before the count of said first down-counter becomes zero, said binary ''''1'''' output signal being indicative of a critical deceleration for actuation of said antiskid system.

Claim 16

An arrangement according to claim 13, further including fourth logic circuitry coupled to each of said flip flops of said first down-counter, selected ones of said flip flops of said second down-counter, selected stages of said second up-counter, said second source and the first of said flip flops of said second downcounter to alter the count of said second down-counter by suppressing m impulse of n impulses of said second impulses between the count of one and zero of said second down-counter, where m and n are different integers.

Claim 17

An arrangement according to claim 14, wherein m is equal to one and n is equal to 16.

Claim 18

An arrangement according to claim 13, further including fourth logic circuitry coupled to each of said flip flops of said first down-counter, selected ones of said flip flops of said second down-counter, selected stages of said second up-counter, said second source and the first of said flip flops of said second down-counter to alter the count of said second down-counter in five different counting zones, each of said zones having a different suppression ratio of iMpulses of said second impulses, said first zone starting at the beginning of the counting of said second down-counter and said fifth zone ends at said first given counting value.

Claim 19

An arrangement according to claim 16, wherein said first zone has a suppression ratio of 1:2, said second zone has a suppression ratio of 1:4, said third zone has a suppression ration of 1:8, said fourth zone has a suppression ratio of 1:16 and said fifth zone has a suppression ratio of 1: 32.

Claim 20

An arrangement according to claim 17, wherein said fourth logic circuitry further provides no suppression ratio between said first given counting value and a count of one of said second down-counter and a suppression ratio of 1:16 between a count of one and zero of said second down-counter.