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US3744015A Expired / Lapsed US ⏱️ 0.0 years remaining

Automatic electronic filter system

Assignee: United States Department of the Navy
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Filing: 1972-04-14
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Granted: 1973-07-03
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Expires: 1992-04-14
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Abstract

Abstract A combination bandpass and rejection filter system having a null point at a center frequency, comprising: A LOCAL OSCILLATOR FOR GENERATING ANY OF A RANGE OF BASIC FREQUENCIES, A SPECIFIC ONE COMPRISING A CENTER FREQUENCY FLO; a direct channel filter circuit connected to the output of the local oscillator and adaptable for connection to an input signal fin, generally containing low and high frequency components; A QUADRATURE CHANNEL FILTER CIRCUIT CONNECTED TO THE OUTPUT OF THE LOCAL OSCILLATOR AND ADAPTABLE FOR CONNECTION TO THE SAME INPUT SIGNAL, FIN, THE SIGNAL PROPAGATING THROUGH THIS FILTER CIRCUIT CONTAINING LOW AND HIGH FREQUENCY COMPONENTS HAVING A PHASE ANGLE WITH RESPECT TO CORRESPONDING LOW AND HIGH FREQUENCY COMPONENTS IN THE DIRECT CHANNEL INPUT FILTER; AND A SUMMING AMPLIFIER CONNECTED TO THE DIRECT AND QUADRATURE CHANNEL FILTER CIRCUITS, WHICH VECTORIALLY SUMS THE LOW AND HIGH FREQUENCY COMPONENTS FROM EACH FILTER CIRCUIT IN A MANNER SO THAT WANTED COMPONENTS ARE ENHANCED AND UNWANTED COMPONENTS ARE DIMINISHED, WITH A NULL POINT AT THE CENTER FREQUENCY FLO.

Inventors

  • 👤 R Marimon
  • 👤 R Matthews
  • 👤 M Maughan
  • 👤 T Maughan

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-24 21:56
CPC Classifications
H; H03; H03H; H03H11/00; H03H11/02; H03H11/04; H03H11/12; H03H19/00; Y; Y10; Y10S; Y10S367/00; Y10S367/901

Claims Analysis

Total Claims: 7
Claim 1
Independent Claim 169 words
A combination bandpass and rejection filter system having a null point at a center frequency, comprising: a local oscillator for generating any of a range of basic frequencies, a specific one comprising a center frequency fLO; a direct channel filter circuit connected to the output of the local oscillator and adaptable for connection to an input signal, fin, generally containing low and high frequency components; a quadrature channel filter circuit connected to the output of the local oscillator and adaptable for connection to the same input signal, fin, the signal propagating through this filter circuit containing low and high frequency components having a phase angle with respect to corresponding low and high frequency components in the direct channel input filter; and a summing amplifier connected to the direct and quadrature channel filter circuits, which vectorially sums the low and high frequency components from each filter circuit in a manner so that wanted components are enhanced and unwanted components are diminished, with a null point at the center frequency fLO.
Claim 2
Dependent Claim 169 words
A combination bandpass and rejection filter system having a null point at a center frequency, comprising: a local oscillator for generating any of a range of basic frequencies, a specific one comprising a center frequency fLO; a direct channel filter circuit connected to the output of the local oscillator and adaptable for connection to an input signal, fin, generally containing low and high frequency components; a quadrature channel filter circuit connected to the output of the local oscillator and adaptable for connection to the same input signal, fin, the signal propagating through this filter circuit containing low and high frequency components having a phase angle with respect to corresponding low and high frequency components in the direct channel input filter; and a summing amplifier connected to the direct and quadrature channel filter circuits, which vectorially sums the low and high frequency components from each filter circuit in a manner so that wanted components are enhanced and unwanted components are diminished, with a null point at the center frequency fLO.
Claim 3
Dependent Claim 73 words
The combination filter system according to claim 1, further comprising: frequency-correcting circuitry connected to the direct and quadrature channel filter circuits and to the local oscillator, which samples the low-frequency components from the two filter circuits and generates an error voltage which is fed to the local oscillator, thereby changing its frequency fLO in a direction to maintain the center frequency constant even with variation of the frequency of the input signal fin.
Claim 4
Dependent Claim 110 words
The combination filter according to claim 2, wherein each channel filter circuit comprises: an input multiplier, connectable to the input signal fin, which down translates the input signal; a low-pass filter, whose input is connected to the output of the input multiplier; a high-pass filter, whose input is connected to the output of the low-pass filter; an output multiplier, whose input is connected to the output of the high-pass filter; and further comprising: a first 90* phase shifter, whose output is connected to the output of the local oscillator and whose input feeds into the quadrature channel input multiplier, for shifting the phase of the input signal fin substantially 90*.
Claim 5
Dependent Claim 87 words
The combination filter according to claim 3, further comprising: a second 90* phase shifter, whose input is the output of the first 90* phase shifter and whose output feeds into the quadrature channel output multiplier, for shifting the phase of the quadrature channel signal substantially an additional 90; and a third 90* phase shifter, whose input is connected to the output of the local oscillator and whose output is connected to the direct channel output multiplier, for shifting the phase of the direct channel signal substantially 90*.
Claim 6
Dependent Claim 230 words
The combination filter according to claim 4, wherein the frequency-correcting circuit comprises: logic circuitry, having as inputs, and connected to, the outputs of the direct and quadrature channel low-pass filters, which can determine whether (1) fin > fLO and the signal in the direct channel leads the signal in the quadrature channel by 90*, or (2) fin < fLO and the signal in the direct channel lags the signal in the quadrature channel, the logic circuitry connectable to a source of input sampling pulses, during the period of one of which the determination is made; a binary up-down counter, which receives a signal from the logic circuitry commanding it to count up or down, depending upon whether fin > fLO or fLO < fin, the counter including a circuit which records the number of positive axis crossings of fin -fLO during the sampling period, thereby registering the magnitude of the fin - fLO error; a resistive network of parallel resistors scaled according to the binary numbers, connected to and between the local oscillator and the up-down counter, the total current flowing across the resistors being proportional to the magnitude of the fin - fLO error, to thereby bring the frequency fLO closer to fin; and a memory, or storage register, associated with the up-down counter, which maintains a constant total current across the resistive network until the next sampling pulse.
Claim 7
Dependent Claim 154 words
The combination filter according to claim 5, further comprising: a doppler threshold circuit which comprises: a frequency scale-down divider circuit, whose input is connected to the output of the local oscillator, for dividing the input frequency fLO by a small integral value; a doppler count circuit whose input is the difference frequency, fin - fLO, from the binary up-down counter, which counts the number of fLO axis crossings that occur during a period of the difference freQuency fLO - fin; input doppler logic circuitry, one of whose inputs is the output of the divider circuit, the doppler logic circuitry being connected to the doppler count circuit, its function being to determine whether the doppler is positive or negative; output doppler logic circuitry, connected to the input doppler logic circuitry and to the frequency-correcting logic, which determines when the doppler from a target exceeds a predetermined amount, and makes the information available at its output.

References Cited (Backward Citations)

US3441905A Cited
US3678394A Cited
US3593256A Cited
US3711822A Cited
US3681745A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1976-07-02 1977-01-01 1977-07-03 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1980-07-02 1981-01-01 1981-07-03 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1984-07-02 1985-01-01 1985-07-03 $7700.00 Window Closed / Lapsed

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