Patent US3743775A successfully refreshed from Google Patents.
US3743775A
Expired / Lapsed
US
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Data demodulator apparatus
Assignee: Collins Radio Co
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Filing: 1972-01-12
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Granted: 1973-07-03
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Expires: 1992-01-12
Abstract
Abstract A MARK/SPACE data demodulator for detecting frequency shift keyed MARK/SPACE incoming signals wherein the reference frequency is obtained at the receiver by detecting the difference in frequency between the MARK and the SPACE frequency signals and utilizing this frequency difference in the data detection process.
Inventors
- 👤 W Hutchinson
- 👤 R Middlestead
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-24 11:29
CPC Classifications
H; H04; H04L; H04L27/00; H04L27/10; H04L27/14; H04L27/144; H04L27/18; H04L27/22; H04L27/227; H04L27/2275; H04L27/2276
Claims Analysis
Total Claims: 10
Claim 1
Independent Claim
99 words
Frequency shift keyed signal receiver apparatus of the class described comprising, in combination: input means for supplying received frequency shift keyed signals representative of MARK and SPACE data; first detection means connected to said input means for detecting the frequency difference between MARK and SPACE data signals and supplying a clock output representative of the frequency difference; and second detection means connected to said input means and said first detection means for receiving said frequency shift keyed signals and said clock output therefrom, said second detectIon means providing binary logic apparatus output signals indicative of MARK and SPACE data.
Claim 2
Dependent Claim
99 words
Frequency shift keyed signal receiver apparatus of the class described comprising, in combination: input means for supplying received frequency shift keyed signals representative of MARK and SPACE data; first detection means connected to said input means for detecting the frequency difference between MARK and SPACE data signals and supplying a clock output representative of the frequency difference; and second detection means connected to said input means and said first detection means for receiving said frequency shift keyed signals and said clock output therefrom, said second detectIon means providing binary logic apparatus output signals indicative of MARK and SPACE data.
Claim 3
Dependent Claim
67 words
Apparatus as claimed in claim 1 wherein said first detection means includes: first and second phase locked loops each locked to one of said MARK and SPACE data frequency shift keyed signals; and means connected to outputs of said first and second phase locked loops for combining and filtering the phase locked outputs thereof to provide the clock output indicative of the MARK and SPACE difference frequency.
Claim 4
Dependent Claim
125 words
Apparatus as claimed in claim 2 wherein said second detection means includes: first and second exclusive OR gates connected for receiving said received frequency shift keyed signals representative of MARK and SPACE data from said input means and for receiving output signals from said first and second phase locked loops and providing outputs indicative of the exclusive OR logical combination thereof; integration means connected to said exclusive OR means and to said first detection means for receiving the logically combined clocked outputs thereof; storage means connected to said integration means for periodically storing the integrated amplitudes; and logic combining means connected to said storage means for logically combining said stored signals representative of MARK and SPACE data for providing said binary logic apparatus output signals.
Claim 5
Dependent Claim
35 words
Apparatus as claimed in claim 3 wherein said input means amplitude limits signals supplied to said exclusive OR means and squares and amplitude limits the signals supplied to said first and second phase locked loops.
Claim 6
Dependent Claim
89 words
Receiver apparatus of the class described comprising, in combination: input means for supplying received frequency shift keyed signals representative of MARK and SPACE data; first detection means connected to said input means for detecting the sideband frequency difference and supplying a clock output representative of the frequency difference; and second detection means connected to said input means and said first detection means for receiving said frequency shift keyed signals and said clock output therefrom, said second detection means providing apparatus output signals indicative of the MARK and SPACE data.
Claim 7
Dependent Claim
89 words
Receiver apparatus of the class described comprising, in combination: input means for supplying received frequency shift keyed signals representative of MARK and SPACE data; first detection means connected to said input means for detecting the sideband frequency difference and supplying a clock output representative of the frequency difference; and second detection means connected to said input means and said first detection means for receiving said frequency shift keyed signals and said clock output therefrom, said second detection means providing apparatus output signals indicative of the MARK and SPACE data.
Claim 8
Dependent Claim
60 words
Apparatus as claimed in claim 5 wherein said first detection means includes: first and second phase locked loops each locked to one of the sideband frequencies; and means connected to outputs of said first and second phase locked loops for combining and filtering the phase locked outputs thereof to provide the clock output indicative of the difference in sideband frequencies.
Claim 9
Dependent Claim
135 words
Apparatus as claimed in claim 5 wherein said second detection means includes: first and second exclusive OR gates connected for receiving said received frequency shift keyed signals representative of MARK and SPACE data from said input means and for receiving output signals from said first and second phase locked loops and providing outputs indicative of the exclusive OR logical combination thereof; first and second integration means connected to said first and second exclusive OR means and to said first detection means for receiving the logically combined outputs thereof; storage means connected to said first and second integration means for periodically storing the polarity of the integrated amplitudes; and logic combining means connected to said storage means for logically combining the stored polarity signals representative of MARK and SPACE data for providing the apparatus output signals.
Claim 10
Dependent Claim
32 words
Apparatus as claimed in claim 5 wherein said input means amplitude limits signals supplied to said second detection means and squares and amplitude limits the signals supplied to said first detection means.
References Cited (Backward Citations)
US3674934A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1976-07-02 | 1977-01-01 | 1977-07-03 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1980-07-02 | 1981-01-01 | 1981-07-03 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1984-07-02 | 1985-01-01 | 1985-07-03 | $7700.00 | Window Closed / Lapsed |