Variable frequency oscillator

Claim 2

An oscillator circuit comprising in combination: a. a differential comparator having multiple inputs for comparing first and second signals and for generating an output signal having first and second values, said first value being generated when said first signal exceeds said second signal and said second value being generated when said second signal exceeds said first signal, said output signal being selectively coupled to first and second switching circuits; b. an inverter circuit coupled to the output of said comparator, the output of said inverter being selectively coupled to third and fourth switching circuits; c. a voltage divider network coupled to a first input of said comparator, and to said switching circuits such that selective activation of said switching circuits selectively couples said voltage divider network to first and second reference voltages thereby generating a two valued reference at said first input of said comparator; d. a timing network coupled to a second input of said comparator and to said switching circuits such that selective activation of said switching circuits selectively couples said timing network to first and second reference voltages thereby generating a sawtooth timing signal at said second input of said comparator.

Claim 3

The oscillator circuit of claim 1 wherein said voltage divider network comprises two series connected resistors.

Claim 4

The oscillator circuit of claim 1 wherein said timing circuit comprises a resistor and a capacitor connected in series.

Claim 5

The oscillator circuit of claim 3 wherein said resistor is variable.

Claim 6

The oscillator circuit of claim 2 wherein at least one of the resistors of said voltage divider network and at least one resistor in said timing network have similar temperature coefficients, such that said oscillator is substantially free of frequency variations due to temperature changes.

Claim 7

The oscillator of claim 2 wherein said timing circuit includes a resistor and at least one resistor in said voltage divider network and said resistor in said timing circuit have similar temperature coefficients and the ratio of the voltage divider resistors is approximately 2.72.

Claim 8

A high stability oscillator circuit having a temperature compensation characteristic comprising: a. a resistance network including a pair of series connected resistors, one of said resistors having a known temperature coeffcient; b. first and second reference signal sources; c. switching means for alternately connecting the resistance network to the first and second reference signals; d. a comparator having a first input terminal operatively connected to terminals common to the pair of series connected resistors of the resistance network; e. a RC timing network including a resistor coupled to a capacitor, said resistor having a temperature coefficient substantially equal to that of the resistance network resistor of known temperature coefficient; f. switching means for alternately connecting the RC timing network to the first and second reference signal sources; g. a second input terminal of said comparator operatively connected to terminals common to the resistor and capacitor of said RC network; and h. first and second feedback networks coupled to the output of the comparator for producing signals of opposite polarity to selectively energize switches of the switching means for the resistance network and for the RC timing network for generating a two level reference signal and a sawtooth shaPed timing signal for the comparator whereby the output frequency of the oscillator is substantially free of temperature induced variations.

Claim 9

A high stability oscillator circuit having a temperature compensation characteristic comprising: a. a resistance network including a pair of series connected resistors, one of said resistors having a known temperature coeffcient; b. first and second reference signal sources; c. switching means for alternately connecting the resistance network to the first and second reference signals; d. a comparator having a first input terminal operatively connected to terminals common to the pair of series connected resistors of the resistance network; e. a RC timing network including a resistor coupled to a capacitor, said resistor having a temperature coefficient substantially equal to that of the resistance network resistor of known temperature coefficient; f. switching means for alternately connecting the RC timing network to the first and second reference signal sources; g. a second input terminal of said comparator operatively connected to terminals common to the resistor and capacitor of said RC network; and h. first and second feedback networks coupled to the output of the comparator for producing signals of opposite polarity to selectively energize switches of the switching means for the resistance network and for the RC timing network for generating a two level reference signal and a sawtooth shaPed timing signal for the comparator whereby the output frequency of the oscillator is substantially free of temperature induced variations.

Claim 10

A high stability oscillator circuit according to claim 7 wherein said resistors of the voltage divider of the reference generator have ohmic values in the ratio substantially equal to 2.72.

Claim 11

A high stability oscillator circuit according to claim 7 wherein said resistor of the R-C circuit of the timing signal generator is a variable resistor to provide a variable frequency oscillator whose frequency is independent of the reference voltage.