Active region logic circuit

Claim 1

A logic circuit having ''''0'''' and ''''1'''' output logic levels comprising: high gain amplifier means including transistor means having an input and output, such output providing said output logic levels, said transistor means having a predetermined active operating region; negative feedback means including a pair of Schottky type diodes parallel connected with the anode of one diode coupled to the cathode of the other and vice versa, said diodes coupled between said output and input, said diodes having a diode drop substantially lower than the diode drop of said transistor means for maintaining said transistor means within said active operating region when said output is at either said ''''0'''' or ''''1'''' logic level, said diodes clamping said output at said ''''0'''' or ''''1'''' logic levels, said diodes causing said input to appear as a virtual ground whereby said input serves as a current summing junction; and control signal means coupled to said input including a first current source for producing a current signal of one polarity and a first magNitude and a second current source for producing a current signal of opposite polarity and a second magnitude, said current signals being algebraically summed at said input, a summed signal of one polarity providing a ''''1'''' output logic level and a summed signal of the opposite polarity providing a ''''0'''' logic level whereby the resultant output logic level is a function of the magnitudes of the input current signals.