Anti-lock brake control system with front to rear interlock

Claim 2

In a four wheel anti-lock brake control system for a vehicle having a pair of braked front wheels and a pair of braked rear wheels, means for sensing front and rear wheel speeds and a control circuit responsive to a function of said wheel speeds to detect incipient wheel lock-up of each pair of wheels and in response thereto cyclically releasing and applying the front and rear brakes, the control circuit including means for preventing the anti-lock cycling of the front brakes when the front wheel speed greatly exceeds the rear wheel speed for a determined time period comprising means responsive to the front and rear wheel speeds for producing a signal when the front speed is above the rear speed by a determinable amount, and timing means responsive to the signal for disabling at least the anti-lock brake control to the front brakes when the signal is present for a determined time period, whereby anti-lock cycling of the front brakes is prevented when the front wheel speed greatly exceeds the rear wheel speed for a determined time period.

Claim 3

In a four-wheel anti-lock brake control system for a vehicle having a pair of braked front wheels and a pair of braked rear wheels, means for sensing front and rear wheel speeds and a control circuit responsive to a function of said wheel speeds to detect incipient wheel lock-up of each pair of wheels and in response thereto cyclically releasing and applying the front and rEar brakes, the control circuit including means for preventing the anti-lock cycling of the front brakes when the front wheel speed greatly exceeds the rear wheel speed for a preset time period comprising means for comparing the front and rear wheel speeds for producing a speed difference signal according to the excess of front speed over rear speed, comparator means for comparing the speed difference signal to a reference value and for producing an output when the speed difference signal exceeds the reference value, timing means activated by the comparator output for producing a disable signal when the comparator output is present for a preset period, and means responsive to the disable signal for disabling at least the anti-lock brake control of the front brakes, whereby anti-lock cycling of the front brakes is prevented when the wheel speed difference is present for the preset period.

Claim 4

In a four-wheel anti-lock brake control system for a vehicle having a pair of braked front wheels and a pair of braked rear wheels, means for sensing front and rear wheel speeds and a control circuit responsive to a function of said wheel speeds to detect incipient wheel lock-up of each pair of wheels and in response thereto cyclically releasing and applying the front and rEar brakes, the control circuit including means for preventing the anti-lock cycling of the front brakes when the front wheel speed greatly exceeds the rear wheel speed for a preset time period comprising means for comparing the front and rear wheel speeds for producing a speed difference signal according to the excess of front speed over rear speed, comparator means for comparing the speed difference signal to a reference value and for producing an output when the speed difference signal exceeds the reference value, timing means activated by the comparator output for producing a disable signal when the comparator output is present for a preset period, and means responsive to the disable signal for disabling at least the anti-lock brake control of the front brakes, whereby anti-lock cycling of the front brakes is prevented when the wheel speed difference is present for the preset period.

Claim 5

In a four wheel anti-lock brake control system for a vehicle having a pair of braked front wheels and a pair of braked rear wheels, means for sensing front and rear wheel speeds and for producing corresponding digital speed signals, and a control circuit responsive to a function of said wheel speeds to detect incipient wheel lock-up of each pair of wheels and in response thereto cyclically releasing and applying the front and rear brakes, the control circuit including means for preventing the anti-lock cycling of the front brakes when the front wheel speed greatly exceeds the rear wheel speed for a preset time period comprising a differential frequency-to-voltage converter responsive to the digital speed signals for producing a DC signal having a voltage corresponding to the excess of front speed over rear speed, a comparator circuit for comparing the output DC signal to a reference signal and for producing an output when the DC signal attains a certain relationship to the reference signal, so that the output signifies that the excess of front speed over rear speed surpasses a determinable value, a timing circuit activated by the comparator output for producing a disable signal when the comparator output is present for a preset period, and means responsive to the disable signal for disabling the anti-lock brake control system, whereby anti-lock cycling of the front brakes is prevented when the front wheel speed greatly exceeds the rear wheel speed for the preset period.

Claim 6

In a four wheel anti-lock brake control system for a vehicle having a pair of braked front wheels and a pair of braked rear wheels, means for sensing front and rear wheel speeds and for producing corresponding digital speed signals, and a control circuit responsive to a function of said wheel speeds to detect incipient wheel lock-up of each pair of wheels and in response thereto cyclically releasing and applying the front and rear brakes, the control circuit including means for preventing the anti-lock cycling of the front brakes when the front wheel speed greatly exceeds the rear wheel speed for a preset time period comprising a differential frequency-to-voltage converter responsive to the digital speed signals for producing a DC signal having a voltage corresponding to the excess of front speed over rear speed, a comparator circuit for comparing the output DC signal to a reference signal and for producing an output when the DC signal attains a certain relationship to the reference signal, so that the output signifies that the excess of front speed over rear speed surpasses a determinable value, a timing circuit activated by the comparator output for producing a disable signal when the comparator output is present for a preset period, and means responsive to the disable signal for disabling the anti-lock brake control system, whereby anti-lock cycling of the front brakes is prevented when the front wheel speed greatly exceeds the rear wheel speed for the preset period.

Claim 7

In a four-wheel anti-lock brake control system for a vehicle having a pair of braked front wheels and a pair of braked rear wheels, means for sensing front and rear wheel speeds and for producing corresponding digital speed signals, and a control circuit responsive to a function of said wheel speeds to detect incipient wheel lock-up of each pair of wheels and in response thereto cyclically releasing and applying the front and rear brakes, the control circuit including means for preventing the anti-lock cycling of the front brakes when the front wheel speed greatly exceeds the rear wheel speed for a determined time period comprising a differential frequency-to-voltage converter responsive to the digital speed signals for producing a DC signal having a voltage corresponding to the excess of front speed over rear speeds, a comparator circuit for comparing the DC signal to a reference signal and for producing an output when the DC signal attains a certain relationship to the reference signal, so that the output signifies that the excess of front speed over rear speed surpasses a determinable value, the comparator circuit including a hysteresis circuit for rendering the comparator insensitive to a ripple which may be present in the DC signal, a timing circuit activated by the comparator output for producing a disable signal when the comparator output is present for a preset period, the timing circuit including a latching circuit for maintaining the disable signal, and means responsive to the disable signal for disabling the anti-lock brake cOntrol system, whereby anti-lock cycling of the front brakes is prevented when front wheel speed greatly exceeds the rear wheel speed for the preset period.

Claim 8

In a four-wheel anti-lock brake control system for a vehicle having a pair of braked front wheels and a pair of braked rear wheels, means for sensing front and rear wheel speeds and for producing corresponding digital speed signals, and a control circuit responsive to a function of said wheel speeds to detect incipient wheel lock-up of each pair of wheels and in response thereto cyclically releasing and applying the front and rear brakes, the control circuit including means for preventing the anti-lock cycling of the front brakes when the front wheel speed greatly exceeds the rear wheel speed for a determined time period comprising a differential frequency-to-voltage converter responsive to the digital speed signals for producing a DC signal having a voltage corresponding to the excess of front speed over rear speeds, a comparator circuit for comparing the DC signal to a reference signal and for producing an output when the DC signal attains a certain relationship to the reference signal, so that the output signifies that the excess of front speed over rear speed surpasses a determinable value, the comparator circuit including a hysteresis circuit for rendering the comparator insensitive to a ripple which may be present in the DC signal, a timing circuit activated by the comparator output for producing a disable signal when the comparator output is present for a preset period, the timing circuit including a latching circuit for maintaining the disable signal, and means responsive to the disable signal for disabling the anti-lock brake cOntrol system, whereby anti-lock cycling of the front brakes is prevented when front wheel speed greatly exceeds the rear wheel speed for the preset period.

Claim 9

In a four-wheel anti-lock brake control system for a vehicle having a pair of braked front wheels and a pair of braked rear wheels, means for sensing front and rear wheel speeds and a control circuit responsive to a function of said wheel speeds to detect incipient wheel lock-up of each pair of wheels and in response thereto cyclically releasing and applying the front and rear brakes, the control circuit including means for preventing the anti-lock cycling of the front brakes when the front wheel speed greatly exceeds the rear wheel speed for a determined time period comprising means for determining when a front wheel speed exceeds a predetermined value and producing a first signal indicating that vehicle speed is above a minimum speed, means for determining when the rear wheel speed is below a lower predetermined value and producing a second signal indicating low rear wheel speed, and timing means responsive to the signals for disabling at least the anti-lock brake control to the front brakes when both signals are present for a determined time period, whereby anti-lock cycling of the front brakes is prevented when the front wheel speed greatly exceeds the rear wheel speed for a determined time period.

Claim 10

In a four-wheel anti-lock brake control system for a vehicle having a pair of braked front wheels and a pair of braked rear wheels, means for sensing front and rear wheel speeds and a control circuit responsive to a function of said wheel speeds to detect incipient wheel lock-up of each pair of wheels and in response thereto cyclically releasing and applying the front and rear brakes, the control circuit including means for preventing the anti-lock cycling of the front brakes when the front wheel speed greatly exceeds the rear wheel speed for a determined time period comprising means for determining when a front wheel speed exceeds a predetermined value and producing a first signal indicating that vehicle speed is above a minimum speed, means for determining when the rear wheel speed is below a lower predetermined value and producing a second signal indicating low rear wheel speed, and timing means responsive to the signals for disabling at least the anti-lock brake control to the front brakes when both signals are present for a determined time period, whereby anti-lock cycling of the front brakes is prevented when the front wheel speed greatly exceeds the rear wheel speed for a determined time period.