Transcalent semiconductor device

Claim 2

A semiconductor device comprising: a. a semiconductor body having a surface; b. a first region of one-type conductivity in said body; c. a second region of a type conductivity opposite to said onetype conductivity in said body, said second region extending to said first region from said surface with a PN junction between said first and second regions, a portion of said junction intersecting said surface; d. electrically-insulating means disposed on said surface and extending across the junction-surface intersection; e. metallizing means disposed on said insulating means; f. an envelope having a discontinuity in the wall thereof, said wall being joined to said metallizing means such that said semiconductor body completely closes said discontinuity and said junction-surface intersection lies entirely within the closed envelope; g. capillary means disposed within said closed envelope; and h. a vaporizable working medium disposed within said closed envelope.

Claim 3

A semiconductor device comprising: a. a semiconductor body having a surface; b. a first region of one-type conductivity in said body; c. a second region of a type conductivity opposite to said one-type conductivity in said body, said second region extending to said first region from said surface with a PN junction between said first and second regions, a portion of said junction intersecting said surface; d. electrically-insulating means disposed on said surface and extending across the junction-surface intersection; e. a gate electrode disposed on said surface in contact with said first region and proximate to said junction-surface intersection; f. metallizing means disposed on said insulating means and in contact with said second region; g. an envelope having a discontinuity in the wall thereof, said wall being joined to said metallizing means such that said semiconductor body completely closes said discontinuity, said junction-surface intersection lies entirely within the closed envelope, and said gate electrode lies outside the closed envelope; h. capillary means disposed within said closed envelope; and i. a vaporizable working medium dsposed within said closed envelope.

Claim 4

A semiconductor device comprising: a. a semiconductor body having a surface; b. a first region of one-type conductivity in said body; c. a second region of a type conductivity opposite to said one-type conductivity in said body, said second region extending to said first region from said surface with a PN junction between said first and second regions, a portion of said junction intersecting said surface; d. electrically-insulating means disposed on said surface and extending across the junction-surface intersection; e. a gate electrode disposed on said surface in contact with said first region and proximate to said junction-surface intersection; f. metallizing means disposed on said insulating means and in contact with said second region; g. an envelope having a discontinuity in the wall thereof, said wall being joined to said metallizing means such that said semiconductor body completely closes said discontinuity, said junction-surface intersection lies entirely within the closed envelope, and said gate electrode lies outside the closed envelope; h. capillary means disposed within said closed envelope; and i. a vaporizable working medium dsposed within said closed envelope.

Claim 5

The semiconductor device of claim 2, wherein said metallizing means extends across said second region.

Claim 6

The semiconductor device of claim 3, wherein at least a portion of said capillary means is disposed on said metallizing means.

Claim 7

The semiconductor device of claim 2, wherein said gate electrode is disposed at or near the periphery of said surface.

Claim 8

A semiconductor device comprising: a. a semiconductor body having a first surface; b. a first region of one-type conductivity in said body; c. a second region of a type conductivity opposite to said one-type conductivity in said body, said second region extending to said first region from said first surface with a PN junction between said first and second regions, a portion of said junction intersecting said first surface; d. electrically-insulating means disposed on said first surface and extending across the junction-surface intersectIon; e. first metallizing means disposed on said insulating means and extending across said first surface, said first metallizing means having an opening therethrough extending to said insulating means such that the peripheral portion of said first metallizing means is in contact with said first region and the inner portion of said first metallizing means is in contact with said second region, said peripheral portion serving as a gate or base electrode and said inner portion serving as a cathode or emitter electrode, respectively; f. a first envelope having a discontinuity in the wall thereof, said first envelope wall being joined to said inner portion of said first metallizing means such that said semiconductor body completely closes said first envelope discontinuity and said junction-surface intersection lies entirely within the closed first envelope; g. first capillary means disposed within said closed first envelope, at least a portion of said first capillary means being disposed on said inner portion of said first metallizing means; and h. a first vaporizable working medium disposed within said closed first envelope.

Claim 9

A semiconductor device comprising: a. a semiconductor body having a first surface; b. a first region of one-type conductivity in said body; c. a second region of a type conductivity opposite to said one-type conductivity in said body, said second region extending to said first region from said first surface with a PN junction between said first and second regions, a portion of said junction intersecting said first surface; d. electrically-insulating means disposed on said first surface and extending across the junction-surface intersectIon; e. first metallizing means disposed on said insulating means and extending across said first surface, said first metallizing means having an opening therethrough extending to said insulating means such that the peripheral portion of said first metallizing means is in contact with said first region and the inner portion of said first metallizing means is in contact with said second region, said peripheral portion serving as a gate or base electrode and said inner portion serving as a cathode or emitter electrode, respectively; f. a first envelope having a discontinuity in the wall thereof, said first envelope wall being joined to said inner portion of said first metallizing means such that said semiconductor body completely closes said first envelope discontinuity and said junction-surface intersection lies entirely within the closed first envelope; g. first capillary means disposed within said closed first envelope, at least a portion of said first capillary means being disposed on said inner portion of said first metallizing means; and h. a first vaporizable working medium disposed within said closed first envelope.

Claim 10

The semiconductor device of claim 6, further comprising: i. a second surface opposite to said first surface of said body; j. second metallizing means disposed on and extending across said second surface; k. a second envelope having a discontinuity in the wall thereof, said second envelope wall being joined to said second metallizing means such that said semiconductor body completely closes said second envelope discontinuity; l. second capillary means disposed within said closed second envelope, at least a portion of said second capillary means being disposed on said second metallizing means; and m. a second vaporizable working medium disposed within said closed second envelope.

Claim 11

The semiconductor device of claim 7, further comprising: n. an edge having portions coextensive with said first and second surfaces of said body; and o. means connected to said first and second envelope walls for protecting said edge from ambient conditions.

Claim 12

The semiconductor device of claim 6, wherein said first and second regions comprise regions of a thyristor body.

Claim 13

The semiconductor device of claim 6, wherein said first and second regions comprise regions of a transistor body.

Claim 14

A semiconductor device comprising: a. a semiconductor body having a surface; b. a junction of two regions of differing conductivities in said body, a portion of said junction intersecting said surface; c. electrically-insulating means disposed on said surface and extending across the junction-surface intercept; and d. a heat pipe having a discontinuous envelope wall, said wall being joined to said insulating means such that said semiconductor body completely closes said discontinuity and said junction-surface intercept lies entirely within the closed envelope.

Claim 15

A semiconductor device comprising: a. a semiconductor body having a surface; b. a junction of two regions of differing conductivities in said body, a portion of said junction intersecting said surface; c. electrically-insulating means disposed on said surface and extending across the junction-surface intercept; and d. a heat pipe having a discontinuous envelope wall, said wall being joined to said insulating means such that said semiconductor body completely closes said discontinuity and said junction-surface intercept lies entirely within the closed envelope.