Bi-phase data recorder

Claim 1

In a decoding system adapted to receive a stream of Bi-Phase mark data formed of a plurality of bit cells defined by the adjacent boundary marks and containing a mark time pulse representative of digital information, means for decoding mark time pulses to produce a stream of binary data comprising: a. an oscillator adapted to produce a signal at a frequency greater than the Bi-Phase means data rate; b. a counter having three stages and effective in a first condition to be responsive to said oscillator for counting at said oscillator signal frequency and in a second condition to stop counting; c. decoding means coupled to said counter and including a first flip-flop and a second flip-flop, said first flip-flop being effective in a first condition to be able to decode mark time pulses and in a second condition to be prevented from decoding such mark time pulses, and said second flip-flop being adapted to be coupled to said first flip-flop at a particular count of said counter to produce a binary output stream; d. means coupled to said counter and responsive to a boundary mark after a selected time interval to cause said counter to switch from said second condition to said first counter condition; e. said counter being effective to cause said first flip-flop to be in its first condition during only a predetermined portion of the period of the total count of said counter and effective in its second condition in other predetermined portions of the period of the total count of said counter means; and f. a NAND gate coupled to said counter and responsive to when said counter has reached a predetermined count to cause said counter to switch to its first condition from its second condition.