Patent US3737867A successfully refreshed from Google Patents.
US3737867A
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US
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Digital computer with accumulator sign bit indexing
Assignee: Individual
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Filing: 1971-02-12
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Granted: 1973-06-05
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Expires: 1991-02-12
Abstract
Abstract In lieu of a separate indexing register, the sign bit of the accumulator may be made to function as a single bit index register to effectuate address modification. In a machine so organized the instructions have a reserved bit position which gives the programmer the option of selecting modified or unmodified addressing. Because of the versatility of this type of instruction, only a few instructions are required to in-line program a variety of normally iterate routines.
Inventors
- 👤 D Cavin
- 👤 R Trousdale
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-25 16:16
CPC Classifications
G; G06; G06F; G06F9/00; G06F9/06; G06F9/30; G06F9/34; G06F9/355; G06F9/30181; G06F9/345
Claims Analysis
Total Claims: 4
Claim 1
Independent Claim
140 words
A digital computer (comprising) having a control unit, a memory for storing instructions having a command field and an operand address field, and an arithmetic unit including an accumulator wherein the improvement comprises: (an accumulator having) a particular bit position in said accumualator for representing the sign of information contained in said accumulator; logic means for identifying the state of said sign bit; instruction register means within said control unit responsive to the transfer of an instruction from said memory for storing the instruction currently being executed; arithmetic means within said arithmetic unit responsively connected to said logic means for modifying the operand address of the instruction which Is stored in said instruction register means and is currently being executed, based upon whether the state of said sign bit of said accumulator is a binary one or a binary zero.
Claim 2
Dependent Claim
140 words
A digital computer (comprising) having a control unit, a memory for storing instructions having a command field and an operand address field, and an arithmetic unit including an accumulator wherein the improvement comprises: (an accumulator having) a particular bit position in said accumualator for representing the sign of information contained in said accumulator; logic means for identifying the state of said sign bit; instruction register means within said control unit responsive to the transfer of an instruction from said memory for storing the instruction currently being executed; arithmetic means within said arithmetic unit responsively connected to said logic means for modifying the operand address of the instruction which Is stored in said instruction register means and is currently being executed, based upon whether the state of said sign bit of said accumulator is a binary one or a binary zero.
Claim 3
Dependent Claim
150 words
In a digital computer (comprising:) having a memory for storing instructions having a command field and an operand address field and having an arithmetic unit which includes an accumulator, the improvement which comprises: (and accumulators having) a particular bit position in said accumulator for representing the sign of information contained in said accumulator; instruction register means for storing the instruction currently being executed; control means responsive to unmodified instructions for executing the instruction upon an operand specified by the address of the instruction irrespective of the state of said sign bit; means for sensing the sign bit of said instruction register; (control) arithmetic means responsively connected to said memory and responsively connected to said means for sensing the sign bit modified instructions, for altering the address where the operand of the instruction being executed is stored based upon whether said sign bit is a binary one or a binary zero.
Claim 4
Dependent Claim
150 words
In a digital computer (comprising:) having a memory for storing instructions having a command field and an operand address field and having an arithmetic unit which includes an accumulator, the improvement which comprises: (and accumulators having) a particular bit position in said accumulator for representing the sign of information contained in said accumulator; instruction register means for storing the instruction currently being executed; control means responsive to unmodified instructions for executing the instruction upon an operand specified by the address of the instruction irrespective of the state of said sign bit; means for sensing the sign bit of said instruction register; (control) arithmetic means responsively connected to said memory and responsively connected to said means for sensing the sign bit modified instructions, for altering the address where the operand of the instruction being executed is stored based upon whether said sign bit is a binary one or a binary zero.
References Cited (Backward Citations)
US2968027A
Cited
US3111648A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1976-06-04 | 1976-12-04 | 1977-06-05 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1980-06-04 | 1980-12-04 | 1981-06-05 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1984-06-04 | 1984-12-04 | 1985-06-05 | $7700.00 | Window Closed / Lapsed |