System for compensating for drift in semiconductor transducers

Claim 2

A drift compensating system for a semiconductor transducer, comprising: a detecting circuit including at least one semiconductor element, said semiconductor element having a resistivity which is variable in proportion to a physical quantity to be applied thereto; power supply means connected to said detecting circuit for applying a voltage across said element; a first output terminal connected to said detecting circuit so as to provide an output based on the change of said resistivity; switching means connected to said first output terminal and closed before the measurement of said physical quantity for compensating any drift of said semiconductor element; a memory circuit having an amplifying element connected to said power supply means, a resistor connected between said amplifying element and said power supply means, and a capacitor, one end of which is connected between said amplifying element and said switching means and the other end of which is connected to said power supply means, for memorizing said output of said detecting circuit as a reference voltage in the measurement of said physical quantity upon closure of said switching means; and a second output terminal connected to said memory circuit for providing the output memorized in said memory circuit, whereby upon closure of said switching means said output of said detecting circuit is applied to the memory circuit to render said first and said second output terminals at the same potential to thereby compensate for any drift, and upon the subsequent opening of said switching means a potential difference appears between said first and said second output terminals in accordance with any change of said output of said detecting circuit.

Claim 3

A drift compensating system according to claim 1, in which said switching means comprises: a field-effect transistor having a gate, a drain connected to said detecting circuit and said first output terminal and a source connected to said memory circuit; and, a pulse generator connected to said gate for automatically delIvering an output pulse to said gate at the commencement of each measuring cycle for permitting said output of said detecting circuit to be impressed on said memory circuit.

Claim 4

A drift compensating system according to claim 1, in which said amplifying element is a field-effect transistor having a drain connected to said power supply means, a gate connected to said switching means and said capacitor, and a source connected to said second output terminal and said resistor, and further comprising another field-effect transistor having a drain connected to said power supply means, a gate connected to the output terminal of said detecting circuit, and a source connected to said first output terminal, said another field-effect transistor having the same characteristics as said field-effect transistor, and a resistor connected between said source of said another field-effect transistor and said power supply means.

Claim 5

A drift compensating system according to claim 1, in which said detecting circuit is a half-bridge circuit comprising a pair of semiconductor elements, and wherein said first output terminal being connected to and between said pair of semiconductor elements.

Claim 6

A drift compensating system according to claim 1, in which said detecting circuit comprises: a bridge circuit having an output therefrom and including a pair of semiconductor elements and a variable resistor having an intermediate tap thereon for preliminarily balancing said bridge circuit, and an operational amplifier connected to said intermediate tap and between said semiconductor elements for amplifying the output of said bridge circuit based on a change of resistivity of said semiconductor elements, said operational amplifier having an output terminal connected to said switching means and said first output terminal.

Claim 7

A drift compensating system for a semiconductor transducer comprising: a bridge circuit including a pair of semiconductor elements to generate an output in accordance with a physical quantity to be applied thereto and a semi-fixed resistor having an intermediate tap thereon to preliminarily balance said bridge circuit; an operational amplifier connected to said intermediate tap and between said semiconductor elements for amplifying said output and having an output terminal; power supply means connected to said bridge circuit for applying a voltage across said semiconductor elements and across said semi-fixed resistor; switching means; a first-effect transistor having a source, a gate connected to the output terminal of said operational amplifier through said switching means, and a drain connected to said power supply means; a first resistor connected to said source; a second field-effect transistor having a source, a gate connected to the output terminal of said operational amplifier, and a drain connected to said power supply means, said second field-effect transistor having the same characteristics as said first field-effect transistor; a second resistor connected to the source of said second field-effect transistor; a first output terminal connected to and between said second resistor and the source of said second field-effect transistor; a second output terminal connected to and between said first resistor and the source of said first transistor; and, a capacitor, one end of which is connected to said field-effect transistor and said switching means and the other end of which is connected to said power supply means, for memorizing the output of said operational amplifier upon closure of said switching means and connected to the gate of said first field-effect transistor for controlling said first field-effect transistor so as to maintain the potential at said second output terminal equal to the potential memorized in said capacitor, whereby upon closure of said switching means the output of said operational amplifier is applied to said capacitor and the gates of said first and said second field-effeCt transistors to render said first and said second output terminals at the same potential to thereby compensate for any drift and upon a subsequent opening of said switching means a potential difference appears between said first and second output terminals in accordance with a change of said output of said operational amplifier.

Claim 8

A drift compensating system for a semiconductor transducer comprising: a bridge circuit including a pair of semiconductor elements to generate an output in accordance with a physical quantity to be applied thereto and a semi-fixed resistor having an intermediate tap thereon to preliminarily balance said bridge circuit; an operational amplifier connected to said intermediate tap and between said semiconductor elements for amplifying said output and having an output terminal; power supply means connected to said bridge circuit for applying a voltage across said semiconductor elements and across said semi-fixed resistor; switching means; a first-effect transistor having a source, a gate connected to the output terminal of said operational amplifier through said switching means, and a drain connected to said power supply means; a first resistor connected to said source; a second field-effect transistor having a source, a gate connected to the output terminal of said operational amplifier, and a drain connected to said power supply means, said second field-effect transistor having the same characteristics as said first field-effect transistor; a second resistor connected to the source of said second field-effect transistor; a first output terminal connected to and between said second resistor and the source of said second field-effect transistor; a second output terminal connected to and between said first resistor and the source of said first transistor; and, a capacitor, one end of which is connected to said field-effect transistor and said switching means and the other end of which is connected to said power supply means, for memorizing the output of said operational amplifier upon closure of said switching means and connected to the gate of said first field-effect transistor for controlling said first field-effect transistor so as to maintain the potential at said second output terminal equal to the potential memorized in said capacitor, whereby upon closure of said switching means the output of said operational amplifier is applied to said capacitor and the gates of said first and said second field-effeCt transistors to render said first and said second output terminals at the same potential to thereby compensate for any drift and upon a subsequent opening of said switching means a potential difference appears between said first and second output terminals in accordance with a change of said output of said operational amplifier.

Claim 9

A drift compensating system according to claim 6, in which said switching means comprises: a field-effect transistor having a gate, a drain connected to the output terminal of said operational amplifier, a source connected to said capacitor and the gate of said first field-effect transistor; and, a pulse generator connected to said gate of said field-effect transistor of said switching means for automatically delivering an output pulse to said gate of said field-effect transistor of said switching means at the commencement of each measuring cycle for permitting the output of said operational amplifier to be imposed on said capacitor.

Claim 10

A drift compensating system according to claim 1, wherein said power supply means is a single power supply.