Claims Analysis
Total Claims: 15
Claim 1
Independent Claim
243 words
A multiplexer receiver neuter detector to detect on a terminal a neuter period of the absence of pulse change between message pulse trains, comprising in combination, a capacitor, means to charge said capacitor intermittently in accordance with the pulses in the message train, means to dIscharge said capacitor intermittently in accordance with the pulses in the message train, one of said charging and discharging means operative between pulses and the other operative during pulses in the message train, collector means to collect pulses from the message train, first means connecting the output of said collector means to said terminal to establish alternately high and low potentials thereat in accordance with said pulse train, said discharge means including a diode connected to conduct current from said capacitor to said terminal when said terminal is at a low potential but not when at a high potential, a counter connected to said collector means to count the number of pulses in the pulse train, second means connecting the output of said counter to said terminal to establish a change between high and low potentials thereat at the end of count, amplifier means having an input and an output, and means connecting the input of said amplifier means to said capacitor to establish one of said charging and discharging means dominant during the message train and the other dominant during the neuter period to change the amplification state of said amplifier means output during the neuter period.
Claim 2
Dependent Claim
243 words
A multiplexer receiver neuter detector to detect on a terminal a neuter period of the absence of pulse change between message pulse trains, comprising in combination, a capacitor, means to charge said capacitor intermittently in accordance with the pulses in the message train, means to dIscharge said capacitor intermittently in accordance with the pulses in the message train, one of said charging and discharging means operative between pulses and the other operative during pulses in the message train, collector means to collect pulses from the message train, first means connecting the output of said collector means to said terminal to establish alternately high and low potentials thereat in accordance with said pulse train, said discharge means including a diode connected to conduct current from said capacitor to said terminal when said terminal is at a low potential but not when at a high potential, a counter connected to said collector means to count the number of pulses in the pulse train, second means connecting the output of said counter to said terminal to establish a change between high and low potentials thereat at the end of count, amplifier means having an input and an output, and means connecting the input of said amplifier means to said capacitor to establish one of said charging and discharging means dominant during the message train and the other dominant during the neuter period to change the amplification state of said amplifier means output during the neuter period.
Claim 3
Dependent Claim
31 words
A detector as set forth in claim 1, wherein said neuter period is the absence of pulses and said charging means is operative between pulses and during the absence of pulses.
Claim 4
Dependent Claim
28 words
A detector as set forth in claim 1, wherein said charging means is operative between pulses and said discharging means is operative during pulses in the message train.
Claim 5
Dependent Claim
25 words
A detector as set forth in claim 1, wherein said charging means includes a resistor in series with said capacitor across a DC voltage source.
Claim 6
Dependent Claim
21 words
A detector as set forth in claim 1, wherein said amplifier means changes to a conducting state during the neuter period.
Claim 7
Dependent Claim
47 words
A detector as set forth in claim 1, wherein said amplifier means includes first and second transistors connected in cascade, means connecting the input of said second transistor to said capacitor, and means connecting the output of said first transistor as the output of said amplifier means.
Claim 8
Dependent Claim
20 words
A detector as set forth in claim 1, wherein said amplifier means includes transistor means having conducting and non-conducting states.
Claim 9
Dependent Claim
47 words
A detector as set forth in claim 1, wherein said amplifier means includes first and second transistors connected in cascade, means connecting the base of said second transistor to said capacitor, and means connecting the collector of said first transistor as the output of said amplifier means.
Claim 10
Dependent Claim
30 words
A detector as set forth in claim 8, including a diode in the cascade connection between said transistors to increase the bias threshold level of operation of said second transistor.
Claim 11
Dependent Claim
52 words
A detector as set forth in claim 1, wherein said collector means collects pulses from the message train into a reconstituted pulse train containing one bit for each unit of time, and said first collecting means establishes alternately high and low potentials at said terminal in accordance with said reconstituted pulse train.
Claim 12
Dependent Claim
21 words
A detector as set forth in claim 10, wherein said counter counts the number of pulses in the reconstituted pulse train.
Claim 13
Dependent Claim
35 words
A detector as set forth in claim 1, wherein said first connecting means establishes a low potential at said terminal during a pulse and a high potential thereat between pulses and during the neuter period.
Claim 14
Dependent Claim
25 words
A detector as set forth in claim 1, wherein said second connecting means establishes a high potential at said terminal at the end of count.
Claim 15
Dependent Claim
108 words
A detector as set forth in claim 1, including reset means having an output of a low potential connected to reset said neuter detector for reception of a subsequent message train upon incidence of incorrect pulse width, a second capacitor, a second diode, third means connecting said second capacitor and second diode to said first capacitor and to said reset means ouTput to momentarily discharge said second capacitor upon incidence of incorrect pulse width, and said connecting means effectively connecting said first and second capacitors in parallel insofar as said charging means is concerned to establish a longer than normal charging time after incidence of incorrect pulse width.