US3573493A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Selection circuit for selecting pulses from a pulse sequence in dependence on the interpulse interval therebetween
Assignee: Robert Bosch Fernsehanlagen GmbH
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Filing: 1969-07-02
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Granted: 1971-04-06
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Expires: 1989-07-02
Abstract
Abstract A capacitor as charged linearly with respect to time during the interpulse intervals of a pulse sequence and short circuited during the occurrence of the pulses. The voltage on the capacitor is supplied to a threshold circuit set to a predetermined threshold value. The output of the threshold circuit, shaped by a trigger circuit, is applied to a pulse width discriminator. The output of the pulse width discriminator comprises pulses corresponding to the input pulses to the discriminator when these input pulses exceed a predetermined width. The input pulse sequence and the output of the pulse width discriminator are applied to the inputs of an AND gate, at whose output thus appear those pulses for which the interpulse interval is less than a predetermined value.
Inventors
- 👤 Gerhard Kamin
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-01 14:30
CPC Classifications
G; G01; G01R; G01R29/00; G01R29/02; G01R29/027; G01R29/0273
Claims Analysis
Total Claims: 10
Claim 1
Independent Claim
200 words
Selection circuit for selecting, from an input pulse sequence having variable interpulse intervals, those pulses for which the interpulse interval is less than a predetermined time period, comprising in combination, first circuit means adapted to receive said pulse sequence at a first circuit input, for combining sequential pulses occurring with interpulse intervals less than said predetermined time period into a single secondary pulse having a secondary pulse width corresponding to the sum of the pulse widths of the so-occurring sequential pulses and the interpulse intervals occurring between said pulses; pulse width discriminator circuit means connected to the output of said first circuit means for furnishing discriminator output pulses corresponding to secondary pulses having a secondary pulse width exceeding a predetermined pulse width; logic AND circuit means having a first and second AND input and an AND output; and connecting means for applying said input pulse sequence to said first AND input and for connecting the output of said pulse width discriminator to said second AND input, whereby an output pulse sequence corresponding to said input pulse sequence will be furnished at said AND output, whenever the interpulse interval in said input pulse sequence is less than said predetermined time period.
Claim 2
Dependent Claim
200 words
Selection circuit for selecting, from an input pulse sequence having variable interpulse intervals, those pulses for which the interpulse interval is less than a predetermined time period, comprising in combination, first circuit means adapted to receive said pulse sequence at a first circuit input, for combining sequential pulses occurring with interpulse intervals less than said predetermined time period into a single secondary pulse having a secondary pulse width corresponding to the sum of the pulse widths of the so-occurring sequential pulses and the interpulse intervals occurring between said pulses; pulse width discriminator circuit means connected to the output of said first circuit means for furnishing discriminator output pulses corresponding to secondary pulses having a secondary pulse width exceeding a predetermined pulse width; logic AND circuit means having a first and second AND input and an AND output; and connecting means for applying said input pulse sequence to said first AND input and for connecting the output of said pulse width discriminator to said second AND input, whereby an output pulse sequence corresponding to said input pulse sequence will be furnished at said AND output, whenever the interpulse interval in said input pulse sequence is less than said predetermined time period.
Claim 3
Dependent Claim
220 words
Selection circuit for selecting, from an input pulse sequence having variable interpulse intervals, those pulses for which the interpulse interval is greater than a predetermined time period, comprising in combination, first circuit means adapted to receive said pulse sequence at a first circuit input, for combining sequential pulses occurring with interpulse intervals less than said predetermined time period into a single secondary pulse having a secondary pulse width corresponding to the sum of the pulse widths of the so-occurring sequential pulses and the interpulse intervals occurring between said pulses; pulse width discriminator circuit means connected to the output of said first circuit means for furnishing discriminator output pulses corresponding to secondary pulses having a secondary pulse width exceeding a predetermined pulse width; inverter circuit means connected to the output of said pulse width discriminator circuit means, for inverting said discriminator output pulses; logic AND circuit means having a first and second AND input and an AND output; and connecting means for applying said input pulse sequence to said first AND input and for connecting the output of said inverter circuit means to said second AND input, whereby an output pulse sequence corresponding to said input pulse sequence will be furnished at said AND output, whenever the interpulse interval in said input pulse sequence is greater than said predetermined time period.
Claim 4
Dependent Claim
220 words
Selection circuit for selecting, from an input pulse sequence having variable interpulse intervals, those pulses for which the interpulse interval is greater than a predetermined time period, comprising in combination, first circuit means adapted to receive said pulse sequence at a first circuit input, for combining sequential pulses occurring with interpulse intervals less than said predetermined time period into a single secondary pulse having a secondary pulse width corresponding to the sum of the pulse widths of the so-occurring sequential pulses and the interpulse intervals occurring between said pulses; pulse width discriminator circuit means connected to the output of said first circuit means for furnishing discriminator output pulses corresponding to secondary pulses having a secondary pulse width exceeding a predetermined pulse width; inverter circuit means connected to the output of said pulse width discriminator circuit means, for inverting said discriminator output pulses; logic AND circuit means having a first and second AND input and an AND output; and connecting means for applying said input pulse sequence to said first AND input and for connecting the output of said inverter circuit means to said second AND input, whereby an output pulse sequence corresponding to said input pulse sequence will be furnished at said AND output, whenever the interpulse interval in said input pulse sequence is greater than said predetermined time period.
Claim 5
Dependent Claim
99 words
Selection circuit as set forth in claim 1, wherein said first circuit means comprise a capacitor; a current source for charging said capacitor in accordance with a predetermined function of time; electronic switching means responsive to the pulses in said input pulse sequence, for short circuiting said capacitor in response to said pulses; and threshold circuit means connected to said capacitor for furnishing a threshold output voltage corresponding to the voltage on said capacitor when said voltage exceeds a predetermined threshold value, and a constant voltage when the voltage on said capacitor is less than said predetermined threshold values.
Claim 6
Dependent Claim
42 words
Selection circuit as set forth in claim 3, further comprising a trigger circuit connected to the output of said threshold circuit means for furnishing substantially rectangular pulses corresponding in width to said threshold output voltage to said pulse width discriminator circuit means.
Claim 7
Dependent Claim
20 words
Selection circuit as set forth in claim 4, wherein said current source charges said capacitor linearly with respect to time.
Claim 8
Dependent Claim
99 words
Selection circuit as set forth in claim 2, wherein said first circuit means comprise a capacitor; a current source for charging said capacitor in accordance with a predetermined function of time; electronic switching means responsive to the pulses in said input pulse sequence, for short circuiting said capacitor in response to said pulses; and threshold circuit means connected to said capacitor for furnishing a threshold output voltage corresponding to the voltage on said capacitor when said voltage exceeds a predetermined threshold value, and a constant voltage when the voltage on said capacitor is less than said predetermined threshold values.
Claim 9
Dependent Claim
42 words
Selection circuit as set forth in claim 6, further comprising a trigger circuit connected to the output of said threshold circuit means for furnishing substantially rectangular pulses corresponding in width to said threshold output voltage to said pulse width discriminator circuit means.
Claim 10
Dependent Claim
20 words
Selection circuit as set forth in claim 7, wherein said current source charges said capacitor linearly with respect to time.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1974-04-05 | 1974-10-05 | 1975-04-06 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1978-04-05 | 1978-10-05 | 1979-04-06 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1982-04-05 | 1982-10-05 | 1983-04-06 | $7700.00 | Window Closed / Lapsed |