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US3737347A Expired / Lapsed US ⏱️ 0.0 years remaining

Graded impurity profile in epitaxial films to improve integrated circuit performance

Assignee: Fairchild Semiconductor Corp
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Filing: 1970-02-26
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Granted: 1973-06-05
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Expires: 1990-02-26
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Abstract

Abstract IN A MONOLITHIC SILICON INTEGRATED CIRCUIT HAVING NPN AND SUBSTRATE PNP TRANSISTORS THEREIN, A SUBSTRATE HAS A LAYER OF INTRINSIC SILICON DEPOSITED OVER ITS SURFACE PRIOR TO AND AS PART OF GROWING AN EPITAXIAL REGION ON LAYER. THE INTRINSIC LAYER ENABLES A NARROW PNP WIDTH BASE AND A GRADED JUNCTION TO BE FORMED INCIDENT TO THE FABRICATION OF THE NPN AND PNP.

Inventors

  • 👤 G Alcott
  • 👤 I Bennett
  • 👤 G Secrest

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-28 20:20
CPC Classifications
H; H10; H10D; H10D84/00; H10D84/60; H10D84/67; H10D84/673; H10D99/00; Y; Y10; Y10S; Y10S148/00; Y10S148/037; Y10S148/085; Y10S148/098; Y10S148/151; Y10S438/00; Y10S438/936

Claims Analysis

Total Claims: 0
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References Cited (Backward Citations)

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USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1976-06-04 1976-12-04 1977-06-05 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1980-06-04 1980-12-04 1981-06-05 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1984-06-04 1984-12-04 1985-06-05 $7700.00 Window Closed / Lapsed

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