Substrate supported semiconductive stack

Claim 2

A semiconductor device comprising an insulative substrate having a groove interposed between first and second spaced lands, said lands defining broad attachment surfaces, contact means overlying said attachment surfaces of said lands, a semiconductor sub-assembly including end-portions formed by axially spaced low resistivity attachment semiconductive elements of a first conductivity type throughout, a mid-portion including at least one junction containing semiconductive element, and means conductively bonding said end-portions to said mid-portion, said attachment semiconductive elements each having a lateral bonding surface, each of said lateral bonding surfaces overlying one of said attachment surfaces of said lands, said mid-portion and said bonding means overlying and being laterally spaced from the groove surface and being axially spaced from said lands, means forming low impedance electrical interconnections between said lateral bonding surfaces of said attachment semiconductive elements and said contact means overlying said attachment surfaces of said lands, terminal lead means spaced from said semiconductor sub-assembly and conductively associated therewith by said conductive means associated with each of said lands, and means protectIvely encapsulating said semiconductor subassembly.

Claim 3

A semiconductor device according to claim 1 in which said mid-portion is comprised of a plurality of serially related junction containing semiconductive elements.

Claim 4

A semiconductor device according to claim 1 in which said means conductively bonding said end portions to said mid-portion is comprised of a metal chosen from the class consisting of aluminum, gold, and silver.

Claim 5

A semiconductor device according to claim 1 in which said conductive means associated with said lands exhibits a melting point below that of said means conductively bonding said end portions to said mid-portion.

Claim 6

A semiconductor device comprising an insulative substrate having first and second lands upstanding above an intervening surface, metallization overlying each of said lands and absent from said intervening surface, a semiconductive sub-assembly comprising a plurality of junction containing semiconductive elements, a pair of low resistivity attachment semiconductive elements of like conductivity type throughout, and means bonding said junction containing semiconductive elements in series stacked relation and one of said attachment elements to each of opposite ends of said stacked junction containing semiconductive elements, each of said attachment elements overlying one of said lands and bonded to said metallization associated therewith, said junction containing elements and said bonding means associated therewith being spaced from said lands and said metallization, passivant means encapsulating at least said junction containing semiconductive elements and extending between said junction containing semiconductive elements and said sub-strate, and means cooperating with said substrate protectively encasing said passivant means and said semiconductive sub-assembly.

Claim 7

A semiconductor device comprising an insulative substrate having first and second lands upstanding above an intervening surface, metallization overlying each of said lands and absent from said intervening surface, a semiconductive sub-assembly comprising a plurality of junction containing semiconductive elements, a pair of low resistivity attachment semiconductive elements of like conductivity type throughout, and means bonding said junction containing semiconductive elements in series stacked relation and one of said attachment elements to each of opposite ends of said stacked junction containing semiconductive elements, each of said attachment elements overlying one of said lands and bonded to said metallization associated therewith, said junction containing elements and said bonding means associated therewith being spaced from said lands and said metallization, passivant means encapsulating at least said junction containing semiconductive elements and extending between said junction containing semiconductive elements and said sub-strate, and means cooperating with said substrate protectively encasing said passivant means and said semiconductive sub-assembly.

Claim 8

The combination comprising an insulative substrate precursor having a plurality of grooves defining at least one central and two additional laterally spaced land including portions, said land including portions defining broad attachment surfaces, means associated with said insulative substrate precursor for adapting sub-division of said substrate precursor into segments each including two laterally spaced lands separated by a groove, a plurality of semiconductor sub-assemblies each including end-portions formed by axially spaced low resistivity attachment semiconductive elements of a first conductivity type throughout, a mid-portion including at least one junction containing semiconductive element, and means conductively bonding said end-portions to said mid-portion, said attachment semiconductive elements each having a lateral bonding surface, one lateral bonding surface of each of four of said semiconductor sub-assemblies overlying said attachment surface of said central land including portion, a remaining lateral bonding surface of each of said four semiconductor sub-assemblies overlying one of said attachment surfaces of said two additional laterally spaced land including portions, each of said semiconductor sub-assemblies being laterally spaced to lie within a separate one of said substrate precursor segments, said mid-portions and said bonding means overlying and being laterally spaced from the groove surfaces and being axially spaced from said attachment surfaces, and means forming low impedance electrical interconnections between said lateral bonding surfaces of said attachment semiconductive elements and said contact means overlying said attachment surfaces.

Claim 9

The combination comprising an insulative substrate precursor having a plurality of grooves defining at least one central and two additional laterally spaced land including portions, said land including portions defining broad attachment surfaces, means associated with said insulative substrate precursor for adapting sub-division of said substrate precursor into segments each including two laterally spaced lands separated by a groove, a plurality of semiconductor sub-assemblies each including end-portions formed by axially spaced low resistivity attachment semiconductive elements of a first conductivity type throughout, a mid-portion including at least one junction containing semiconductive element, and means conductively bonding said end-portions to said mid-portion, said attachment semiconductive elements each having a lateral bonding surface, one lateral bonding surface of each of four of said semiconductor sub-assemblies overlying said attachment surface of said central land including portion, a remaining lateral bonding surface of each of said four semiconductor sub-assemblies overlying one of said attachment surfaces of said two additional laterally spaced land including portions, each of said semiconductor sub-assemblies being laterally spaced to lie within a separate one of said substrate precursor segments, said mid-portions and said bonding means overlying and being laterally spaced from the groove surfaces and being axially spaced from said attachment surfaces, and means forming low impedance electrical interconnections between said lateral bonding surfaces of said attachment semiconductive elements and said contact means overlying said attachment surfaces.