Video signal processing stage which performs plural functions

Claim 1

The combination comprising: a semiconductor rectifier having anode and cathode electrodes; a first transistor having an emitter electrode coupled to a point of reference potential, a collector electrode coupled to the anode electrode of said rectifier, and a base electrode; signal supply means having a first terminal applying composite video input signals to the cathode electrode of said rectifier to be demodulated thereby, and also having a second terminal; a first load circuit coupling the anode electrode of said rectifier to the second terminal of said signal supply means; a second load circuit coupling the second terminal of said signal supply means to said point of reference potential and having an impedance characteristic substantially less than that of said first load circuit; and means for supplying trigger pulses to the base electrode of said first transistor to alter its conductivity state and the effective load impedance presented to said input signals during the horizontal synchronizing pulse interval of said composite video signal; whereby first output signals are developed at the anode electrode of said rectifier by said first load circuit during the active line interval of said composite signal and whereby second output signals are developed at the cathode electrode of said rectifier by said second load circuit during the horizontal retrace interval of said composite signal.