Digital analysis of electric wave signals

Claim 3

Apparatus for automatically measuring and digitally displaying the duty cycle of a repetitive pulse signal having a fractional active portion, which comprises: means for generating a clock measuring frequency, means for gating a reduced frequency component thereof with said signal for the period of a complete cycle thereof to produce and accumulate by a first counting means a summation of a first series of pulses of total duration equal to said period, a second counting means for repetitively counting pulses of said clock frequency up to the count of said summation, comparator means for said first and second counting means for generating a pulse signal at the end of each said count to reset said first counting means and to produce a series of pulses spaced at intervals equal to said signal period divided by said reduced frequency, means for concurrently gating said pulse signal with said reduced frequency to produce and accumulate by a third counting means a summation of a second series of pulses of total duration equal to that of the active fraction of said signal, means for reversing the counting order of said third counting means back to zero over an interval equal to the duration of said fractional period, and means including a digital counter for counting during said interval the number of pulses of said first series occurring during said interval to produce a count equal to the duty cycle of said pulse signal multiplied by said reduced frequency, and digitally displaying said count.

Claim 4

Apparatus for automatically measuring and digitally displaying the duty cycle of a repetitive pulse signal having a fractional active portion, which comprises: means for generating a clock measuring frequency, means for gating a reduced frequency component thereof with said signal for the period of a complete cycle thereof to produce and accumulate by a first counting means a summation of a first series of pulses of total duration equal to said period, a second counting means for repetitively counting pulses of said clock frequency up to the count of said summation, comparator means for said first and second counting means for generating a pulse signal at the end of each said count to reset said first counting means and to produce a series of pulses spaced at intervals equal to said signal period divided by said reduced frequency, means for concurrently gating said pulse signal with said reduced frequency to produce and accumulate by a third counting means a summation of a second series of pulses of total duration equal to that of the active fraction of said signal, means for reversing the counting order of said third counting means back to zero over an interval equal to the duration of said fractional period, and means including a digital counter for counting during said interval the number of pulses of said first series occurring during said interval to produce a count equal to the duty cycle of said pulse signal multiplied by said reduced frequency, and digitally displaying said count.

Claim 7

Apparatus for automatically measuring and digitally displaying the duty cycle of a repetitive pulse signal having a duration per cycle of TD and a fractional active duty portion of duration TB, comprising: a clock signal generator of frequency fc and a first counter activated thereby for successive intervals of 1/fc, gating input means for said pulse signal and a reduced frequency signal fc/n from said clock generator for impressing on a second counter pulse signals each of duration n/fc for the period TD of said pulse signal to provide an accumulated count therein of Sigma D TD.fc/n, comparator means receptive of said pulses from said first and second counters for emitting a pulse each time the count in said first counter reaches the accumulated count in said second counter and for then resetting said first counter to zero thereby to produce a series of pulses spaced at intervals of TD/n; a second gating means for reception of said pulse signal and said clock frequency fc/n for impressing on a reversible counter pulses each of duration n/fc for the duration of the active portion TB of said pulse signal for accumulating a count thereon of Sigma B TB.fc/n, a zero detector receptive of said accumulated count for reversing the count direction of said reversible counter and for activating a digital counter to count pulses received from said comparator, said zero detector responding to a zero count down signal from said reversible counter to stop said clock, thereby to stop the count in said digital counter at a count equal to the ratio TB/TD.n.

Claim 8

Apparatus for automatically measuring and digitally displaying the duty cycle of a repetitive pulse signal having a duration per cycle of TD and a fractional active duty portion of duration TB, comprising: a clock signal generator of frequency fc and a first counter activated thereby for successive intervals of 1/fc, gating input means for said pulse signal and a reduced frequency signal fc/n from said clock generator for impressing on a second counter pulse signals each of duration n/fc for the period TD of said pulse signal to provide an accumulated count therein of Sigma D TD.fc/n, comparator means receptive of said pulses from said first and second counters for emitting a pulse each time the count in said first counter reaches the accumulated count in said second counter and for then resetting said first counter to zero thereby to produce a series of pulses spaced at intervals of TD/n; a second gating means for reception of said pulse signal and said clock frequency fc/n for impressing on a reversible counter pulses each of duration n/fc for the duration of the active portion TB of said pulse signal for accumulating a count thereon of Sigma B TB.fc/n, a zero detector receptive of said accumulated count for reversing the count direction of said reversible counter and for activating a digital counter to count pulses received from said comparator, said zero detector responding to a zero count down signal from said reversible counter to stop said clock, thereby to stop the count in said digital counter at a count equal to the ratio TB/TD.n.