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US3735242A Expired / Lapsed US ⏱️ 0.0 years remaining

Series voltage regulator wherein an fet supplies a constant current reference voltage to a differential comparator

Assignee: Hach Co
•
Filing: 1971-10-29
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Granted: 1973-05-22
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Expires: 1991-10-29
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Abstract

Abstract A series-type dc. voltage regulator includes an operational amplifier as a very sensitive differential comparator for comparing the regulated output voltage against a very stable reference so as to provide an error signal for correctively adjusting the collector-emitter impedance of a series regulating transistor in response to even very small deviations of the output voltage from its set point. The reference voltage is developed internally by using a field effect transistor, biased to operate in a temperature stabilized constant current mode, to drive current through a voltage dropping resistance. The operational amplifier is powered by the dc. source with which the voltage regulator is employed and has an output offset to foreshorten the rise time of the regulated output voltage.

Inventors

  • 👤 M Andersen

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-08 01:50
CPC Classifications
G; G05; G05F; G05F1/00; G05F1/10; G05F1/46; G05F1/468

Claims Analysis

Total Claims: 8
Claim 1
Independent Claim 203 words
An extremely sensitive dc. voltage regulator capable of retaining its sensitivity and providing a stable dc. output voltage in response to a dc. input voltage even when employed to regulate dc. voltages which are substantially lower than 6.0 6.5 volts, said regulator comprising an input and an output; a variable impedance means coupled in series between said input and output; a constant current means and a resistance coupled in series across said output for supplying a predetermined reference voltage, said constant current means being a field effect transistor having a source-drain circuit connected in series with said resistance across said output and a gate-source circuit biased for operation of said field effect transistor in a temperature stabilized, constant current mode; a differential comparator means having one input coupled to said output and another input coupled to said resistance for supplying an error signal in response to any deviation of said output voltage from a predetermined set point; and means coupled between said comparator means and said variable impedance means for correctively adjusting said variable impedance means in response to said error signal to restore said output voltage to its set point, whereby said output voltage is held substantially constant at its set point.
Claim 2
Dependent Claim 203 words
An extremely sensitive dc. voltage regulator capable of retaining its sensitivity and providing a stable dc. output voltage in response to a dc. input voltage even when employed to regulate dc. voltages which are substantially lower than 6.0 6.5 volts, said regulator comprising an input and an output; a variable impedance means coupled in series between said input and output; a constant current means and a resistance coupled in series across said output for supplying a predetermined reference voltage, said constant current means being a field effect transistor having a source-drain circuit connected in series with said resistance across said output and a gate-source circuit biased for operation of said field effect transistor in a temperature stabilized, constant current mode; a differential comparator means having one input coupled to said output and another input coupled to said resistance for supplying an error signal in response to any deviation of said output voltage from a predetermined set point; and means coupled between said comparator means and said variable impedance means for correctively adjusting said variable impedance means in response to said error signal to restore said output voltage to its set point, whereby said output voltage is held substantially constant at its set point.
Claim 3
Dependent Claim 45 words
The voltage regulator of claim 1 wherein a portion of said resistance is connected across the gate-source circuit of said transistor to serve as a self-biasing resistance, said self-biasing resistance being selected to bias said transistor for operation in said temperature stabilized, constant current mode.
Claim 4
Dependent Claim 56 words
The voltage regulator of claim 1 wherein said variable impedance means includes a first transistor having a collector-emitter power circuit connected in series between said input and said output and a base-emitter control circuit, and said comparator means comprises an operational amplifier sensitive to even very slight deviations of said output voltage from its set point.
Claim 5
Dependent Claim 26 words
The voltage regulator of claim 10 wherein the collector-emitter circuit of said first transistor comprises the only lumped impedance in series between said input and output.
Claim 6
Dependent Claim 65 words
The voltage regulator of claim 3 further including another transistor having a base coupled to receive said error signal and a collector-emitter circuit connected in series with the base-emitter circuit of said first transistor, whereby said other transistor is controlled by said error signal to correctively adjust the collector-emitter impedance of said first transistor as necessary to stabilize said output voltage at its set point.
Claim 7
Dependent Claim 45 words
The voltage regulator of claim 5 further including bias means coupled to said other transistor for supplying a bias selected to hold both said first and said other transistors in non-conductive states when said output voltage is at least as high as its set point.
Claim 8
Dependent Claim 50 words
The voltage regulator of claim 6 wherein said operational amplifier is powered by said input voltage and has a predetermined output offset voltage for switching said first and said other transistors into conduction in response to the appearance of said input voltage to thereby reduce the output voltage rise time.

References Cited (Backward Citations)

US3441833A Cited
US3509448A Cited
US3577063A Cited
US3571604A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1976-05-21 1976-11-20 1977-05-22 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1980-05-21 1980-11-20 1981-05-22 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1984-05-21 1984-11-20 1985-05-22 $7700.00 Window Closed / Lapsed

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