Dynamic convergence circuits

Claim 2

A vertical rate convergence circuit comprising: a source of vertical rate voltage waves; a convergence magnet winding; a switching network including first and second transistors, each having their input and output electrodes serially coupling said source to said winding; and means applying a gating voltage signal to the control electrodes of said first and second transistors to alternatively render respective ones of said transistors conductive, whereby said first transistor connects said source to energize said winding during a predetermined portion of the cycle of said vertical rate waves and whereby said second transistor connects said source to energize said winding only during the remaining portion of the cycle of said vertical rate waves.

Claim 3

The vertical rate convergence circuit of claim 1 wherein said switching network includes a pair of potentiometers, each having a resistance element between end terminals thereof for individually shunting the output electrodes of said first and second transistors to a point of reference potential, and also having an adjustable tap for coupling to a common end of said convergence magnet winding, whereby tap adjustment is effective to vary the magnitude of the energization of said winding during the conductive portion of the transistor associated with the potentiometer being adjusted.

Claim 4

The vertical rate convergence circuit of claim 1 wherein said last-mentioned means applies a gating signal to said first and second transistors to render said transistors alternatively conductive during respective half portions of the cycle of said vertical rate waves.

Claim 5

The vertical rate convergence circuit of claim 3 wherein said first transistor is of PNP type conductivity having emitter and collector input and output electrodes, respectively, wherein said second transistor is of NPN type conductivity having collector and emitter input and output electrodes, and wherein said first and second transistors each have a base control electrode.

Claim 6

The vertical rate convergence circuit of claim 4 where said last-mentioned means applies a gating signal to the base control electrodes of said transistors to render said first transistor conductive to energize said convergencE winding during the first half of the cycle of said vertical rate waves and to render said second transistor conductive to energize said winding only during the second half of the cycle of said vertical waves.

Claim 7

In a color television receiver including a vertical deflection circuit providing a source of vertical rate voltage waveforms, a convergence circuit comprising: a pair of convergence windings effectively coupled in parallel connection; a switch network including first and second transistors, each having their input and output electrodes serially coupling said source to one end of each of said pair of windings; means applying a gating voltage signal to the control electrodes of said first and second transistors to alternatively render respective ones of said transistors conductive, whereby said first transistor connects said source to energize said windings during a predetermined portion of the cycle of said vertical rate waves and whereby said second transistor connects said source to energize said windings only during the remaining portion of the cycle of said vertical rate waves; and means associated with each transistor for varying the energization provided thereby to said windings in response to said gating signal, with said variation being in the same sense in each winding.

Claim 8

In a color television receiver including a vertical deflection circuit providing a source of vertical rate voltage waveforms, a convergence circuit comprising: a pair of convergence windings effectively coupled in parallel connection; a switch network including first and second transistors, each having their input and output electrodes serially coupling said source to one end of each of said pair of windings; means applying a gating voltage signal to the control electrodes of said first and second transistors to alternatively render respective ones of said transistors conductive, whereby said first transistor connects said source to energize said windings during a predetermined portion of the cycle of said vertical rate waves and whereby said second transistor connects said source to energize said windings only during the remaining portion of the cycle of said vertical rate waves; and means associated with each transistor for varying the energization provided thereby to said windings in response to said gating signal, with said variation being in the same sense in each winding.

Claim 9

The convergence circuit of claim 6 also including: means associated with each transistor for varying the energization provided thereby to said windings in response to said gating signal in mutually opposing sense in each winding, with this means substantially coupling like ends of said windings to receive the energization from said source.

Claim 10

The convergence circuit of claim 7 wherein said first-mentioned energization varying means comprises a first pair of potentiometers, each having a resistance element between end terminals thereof for individually shunting the output electrodes of said first and second transistors to a point of reference potential, and also having an adjustable tap for coupling to said convergence magnet windings, whereby tap adjustment is effective to vary the magnitude of the energization of said windings during the conductive portion of the transistor associated with the potentiometer being adjusted, and wherein said last-mentioned energization varying means comprises a second pair of potentiometers, each also having a resistance element between end terminals thereof for individually coupling said like ends of said convergence magnet windings, and also having an adjustable tap for coupling to said individual taps of said first pair of potentiometers, whereby adjustment of said second adjustable taps is effective to vary the division of the magnitude of energization between said convergence windings as provided during the conductive portion of the transistor associated with the one of the first pair of potentiometers to whose tap said second adjusted potentiometer tap is coupled.