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US3731209A Expired / Lapsed US ⏱️ 0.0 years remaining

Peak voltage detector circuit

Assignee: Northrop Grumman Corp
•
Filing: 1972-05-15
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Granted: 1973-05-01
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Expires: 1992-05-15
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Abstract

Abstract A peak voltage detector for detecting the peak of an input voltage and holding this peak value for a predetermined period of time includes a capacitive charging circuit for charging to the peak of the input voltage, a pair of series connected unidirectional electronic valve devices such as diodes connected across the capacitor, and an inverting amplifier, the input of which is connected to receive the voltage on one plate of the capacitor, the output of which is connected to the interconnection point between the electronic valve devices. The peak voltage is held on the capacitor be means of an amplifying feedback circuit provided by the inverting amplifier and the electronic valve devices.

Inventors

  • 👤 R Satterfield

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-30 09:43
CPC Classifications
G; G06; G06G; G06G7/00; G06G7/12; G06G7/25; G01; G01R; G01R19/00; G01R19/04

Claims Analysis

Total Claims: 8
Claim 1
Independent Claim 208 words
A peak detector circuit for detecting the peak value of a signal and holding this signal for a period of time, comprising: a resistive-capacitive charging circuit including a resistor and a capacitor connected in series, means for feeding said signal to said resistive-capacitive charging circuit To provide a charging current therefor, a pair of series connected unidirectional electronic valve devices, said series connected electronic valve devices being connected across said capacitor, an output terminal connected to the common connection between one of the leads of said capacitor and said electronic valve devices, an inverting amplifier, the input of said amplifier being connected to the common connection between the other of the leads of said capacitor and said electronic valve devices, the output of said amplifier being connected to the common connection between said pair of electronic valve devices, whereby negative feedback is applied to the input of said amplifier through one of said electronic valve devices to maintain a substantially null signal thereat when the input signal is present and a negative feedback signal is applied to said amplifier through the other of said electronic valve devices to the output terminal to maintain said output substantially constant for a period of time after said input signal has disappeared.
Claim 2
Dependent Claim 208 words
A peak detector circuit for detecting the peak value of a signal and holding this signal for a period of time, comprising: a resistive-capacitive charging circuit including a resistor and a capacitor connected in series, means for feeding said signal to said resistive-capacitive charging circuit To provide a charging current therefor, a pair of series connected unidirectional electronic valve devices, said series connected electronic valve devices being connected across said capacitor, an output terminal connected to the common connection between one of the leads of said capacitor and said electronic valve devices, an inverting amplifier, the input of said amplifier being connected to the common connection between the other of the leads of said capacitor and said electronic valve devices, the output of said amplifier being connected to the common connection between said pair of electronic valve devices, whereby negative feedback is applied to the input of said amplifier through one of said electronic valve devices to maintain a substantially null signal thereat when the input signal is present and a negative feedback signal is applied to said amplifier through the other of said electronic valve devices to the output terminal to maintain said output substantially constant for a period of time after said input signal has disappeared.
Claim 3
Dependent Claim 12 words
The circuit of claim 1 wherein said electronic valve devices are diodes.
Claim 4
Dependent Claim 60 words
The circuit of claim 2 wherein said circuit is a positive peak detector, the cathode of one of said diodes being connected to the anode of the other of said diodes, the anode of said first mentioned diode being connected to the input of said amplifier, the cathode of the other of said diodes being connected to said output terminal.
Claim 5
Dependent Claim 33 words
The circuit of claim 1 and additionally including sampling switch means interposed between the input signal and the charging circuit and sampling control means for controlling the operation of said sampling switch means.
Claim 6
Dependent Claim 32 words
The circuit of claim 1 wherein said charging circuit additionally includes a second capacitor and means for selecting said second capacitor from a group of capacitors in response to a command signal.
Claim 7
Dependent Claim 39 words
The circuit of claim 4 and additionally including initializing switch means connected across said capacitor, said initializing switch means operating in response to a reset signal to discharge said capacitor prior to the operation of said sampling switch means.
Claim 8
Dependent Claim 38 words
The circuit of claim 1 and additionally including buffer amplifier means interposed between said common connector between said one of said capacitor leads and said electronic valve devices and said output terminal to provide isolation for said circuit.

References Cited (Backward Citations)

US3192481A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1976-04-30 1976-10-30 1977-05-01 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1980-04-30 1980-10-30 1981-05-01 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1984-04-30 1984-10-30 1985-05-01 $7700.00 Window Closed / Lapsed

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