Patent US3731161A successfully refreshed from Google Patents.
US3731161A
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US
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Semiconductor integrated circuit
Assignee: NEC Corp
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Filing: 1971-09-03
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Granted: 1973-05-01
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Expires: 1991-09-03
Abstract
Abstract A semiconductor integrated circuit comprises a plurality of insulated gate type field effect transistors formed in a common semiconductor substrate. One of the transistors receives an input signal from an external circuit. The gate insulator film of the receiving transistor is thicker than the insulator film of the other insulated gate type field effect transistors formed on the common substrate.
Inventors
- 👤 H Yamamoto
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-23 14:30
CPC Classifications
H; H03; H03K; H03K19/00; H03K19/02; H03K19/08; H03K19/094; H10; H10D; H10D84/00; H10D84/80; H10D84/82; H10D84/83; H10D84/8314; Y; Y10; Y10S; Y10S148/00; Y10S148/053; Y10S148/122; Y10S148/163
Claims Analysis
Total Claims: 4
Claim 1
Independent Claim
131 words
A semiconductor integrated logic circuit having a first insulated gate type field effect transistor and a second insulated gate type field transistor formed in a common substrate, the gate terminal of said first transistor connected to an input terminal for receiving an input signal from an external circuit wherein the improvement comprises the gate insulator film means of said first transistor being thicker than that of said second transistor, said film means producing a higher threshold voltage for said first transistor than for said second transistor so that said logic circuit has an improved input-to- output characteristic including a broad tolerance to the input noise level than a semiconductor logic circuit comprising insulated gate type field effect transistors each of which has a gate insulation film of substantially the same thickness.
Claim 2
Dependent Claim
131 words
A semiconductor integrated logic circuit having a first insulated gate type field effect transistor and a second insulated gate type field transistor formed in a common substrate, the gate terminal of said first transistor connected to an input terminal for receiving an input signal from an external circuit wherein the improvement comprises the gate insulator film means of said first transistor being thicker than that of said second transistor, said film means producing a higher threshold voltage for said first transistor than for said second transistor so that said logic circuit has an improved input-to- output characteristic including a broad tolerance to the input noise level than a semiconductor logic circuit comprising insulated gate type field effect transistors each of which has a gate insulation film of substantially the same thickness.
Claim 3
Dependent Claim
42 words
The semiconductor integrated logic circuit claimed in claim 1, in which the thickness of the gate insulation film of said first transistor is approximately 4,000 A, and the thickness of the gate insulation film of said second transistor is approximately 1,500 A.
Claim 4
Dependent Claim
30 words
The semiconductor integrated logic circuit claimed in claim 1, further comprising an output terminal coupled to the source of said second transistor and to the drain of said first transistor.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1976-04-30 | 1976-10-30 | 1977-05-01 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1980-04-30 | 1980-10-30 | 1981-05-01 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1984-04-30 | 1984-10-30 | 1985-05-01 | $7700.00 | Window Closed / Lapsed |