Signal combiner or divider for differing frequencies

Claim 1

Apparatus for combining or for separating a plurality 2n of signals of 2n serially different frequencies comprising in combination; a plurality n of sets of power splitter devices formed in a single block of material, the first set containing one device, the next set containing two devices, the next set containing four devices and so on to the nth set which contains 2n 1 devices; each device comprising a pair of waveguides defining a pair of ports at one end, a further port at the opposite end and a load termination at said opposite end, in which one waveguide leads from one of said pair of ports to said load termination and the other of said waveguides leads from the other of said pair of ports to said further port, a pair of 3db couplers connecting said waveguides between the opposite ends thereof to define a first waveguide length between such couplers in said one waveguide and a second waveguide length between such couplers in said other waveguide in which said first and second lengths are unequal, the first and second waveguide lengths being the same for all devices of a set and the second waveguide lengths being progressively smaller from the first to the nth set; said 2n signals being coupled individually with the ports of said pairs of ports of the devices of the nth set with the first 2n 1 signals being coupled with the said one ports of said pairs of ports and the remaining signals being coupled with the said other ports of said pairs of ports and with each pair of ports having those signals coupled thereto which differ in the series by 2n 1, said further ports of said nth set being coupled individually to said ports of said pairs of ports of the n-1th set such that the signals coupled to the said one port of each device of said n-1th set are serially lower than the signal coupled to the other port by 2n 2, and so on to the device of the first set; and said second waveguide lengths of the n sets being of lengths to cause those signals coupled between the other ports of said pairs of ports and said further ports to suffer a phase shift of m180*, where m is an odd integer, while those signals coupled between said further ports and said one port of said pairs of ports suffer a phase shift of k360* where k is zero or any integer.