Variable increment digital function generator

Claim 2

A digital function generator for generating a digital signal indicative of a predetermined function of an analog input signal, comprising, in combination: encoding means for converting the input signal into a digital output signal indicative of incremental amplitudes thereof; address means for providing a timing signal and cyclically rippled binary signals in parallel bits; memory means for providing a timing signal and cyclically rippled binary signals in parallel bits; memory means connected to receive the cyclically rippled binary signals in parallel bits, having programmed therein predetermined first order functions corresponding to discrete amplitudes within any group of amplitudes of said encoder means output signal for providing a first order output signal; interval selecting means connected to receive said timing signal, a pRedetermined number of the binary signals from the end of each cycle, and said first order output signal, having programmed therein predetermined second order functions corresponding to discrete groups of amplitudes, for providing an output signal indicative of preselected amplitude group; and indicator means connected to receive the output signals from said interval selecting means, said address means, and said encoding means for providing an output signal indicative of predetermined combinations thereof.

Claim 3

A digital function generator for providing a predetermined function signal of a continuous input signal comprising, in combination: encoding means for converting the input signal into a digital output signal indicative of incremental amplitudes thereof; fixed increment counter means for cyclically producing in equal increments an output signal of increasing amplitude; memory means connected to receive fixed increment counter means output signal, having programmed therein predetermined first order function difference increments corresponding to discrete amplitudes within any group of amplitudes of said fixed increment counter means output signal for providing a first order output signal; group detector means operatively connected to receive said fixed increment counter means output signal, having programmed therein predetermined second order function difference increments corresponding to discrete groups of amplitudes, for providing an output signal indicative of preselected amplitude group; logic means connected to receive the output signals of said fixed increment counter means and said memory means for providing an output signal indicative of predetermined combinations thereof; variable increment counter means connected to receive said logic means output signal for sequentially accumulating said output signal and providing an output signal indicative of the accumulated amplitude thereof; comparator means connected to receive the encoder means signal and said fixed increment counter means signal for providing an output signal indicative of a match therebetween; and readout means connected to receive said logic means and said variable increment counter means output signals for providing an output signal indicative of said variable counter means output signal concurrent with receiving a match signal from said comparator means.

Claim 4

A digital function generator for providing a predetermined function signal of a continuous input signal comprising, in combination: encoding means for converting the input signal into a digital output signal indicative of incremental amplitudes thereof; fixed increment counter means for cyclically producing in equal increments an output signal of increasing amplitude; memory means connected to receive fixed increment counter means output signal, having programmed therein predetermined first order function difference increments corresponding to discrete amplitudes within any group of amplitudes of said fixed increment counter means output signal for providing a first order output signal; group detector means operatively connected to receive said fixed increment counter means output signal, having programmed therein predetermined second order function difference increments corresponding to discrete groups of amplitudes, for providing an output signal indicative of preselected amplitude group; logic means connected to receive the output signals of said fixed increment counter means and said memory means for providing an output signal indicative of predetermined combinations thereof; variable increment counter means connected to receive said logic means output signal for sequentially accumulating said output signal and providing an output signal indicative of the accumulated amplitude thereof; comparator means connected to receive the encoder means signal and said fixed increment counter means signal for providing an output signal indicative of a match therebetween; and readout means connected to receive said logic means and said variable increment counter means output signals for providing an output signal indicative of said variable counter means output signal concurrent with receiving a match signal from said comparator means.

Claim 5

A digital function generator according to claim 2, further comprising: said memory means including a plurality of storage means each having programmed therein respective ones of said first order functions, address means connected to receive said fixed increment counter means signal for selecting corresponding ones of said storage means and providing said memory means output signal indicative of the stored contents thereof.

Claim 6

A digital function generator according to claim 3, further comprising: said logic means including a plurality of gates each operatively connected to receive corresponding ones of said detector means output signals and said memory means signal for selectively producing function increment signals of predetermined amplitude corresponding to preselected combinations thereof.

Claim 7

A digital memory device for storing thereon a function of an input signal, comprising: first means for converting the input signal into binary coded output signals corresponding to preselected intervals thereof; second means operatively connected to receive the input signal for providing a set of incremental output signals indicative of the amplitudes of the input signal within the preselected intervals thereof; and third means operatively connected to receive said first and second means output signals for providing an incremental output signal indicative of the amplitude of the input signal.

Claim 8

A digital memory device for storing thereon a function of an input signal, comprising: first means for converting the input signal into binary coded output signals corresponding to preselected intervals thereof; second means operatively connected to receive the input signal for providing a set of incremental output signals indicative of the amplitudes of the input signal within the preselected intervals thereof; and third means operatively connected to receive said first and second means output signals for providing an incremental output signal indicative of the amplitude of the input signal.

Claim 9

A digital function generator for producing a predetermined digital function signal on receiving a continuous input signal, comprising, in combination: encoder means fOr converting the continuous input signal into a binary coded signal; fixed increment counter means for cyclically producing between a minimum and maximum amplitude a binary coded output signal sequentially incremented in equal least significant bits; memory means connected to receive said fixed increment counter means output signal, having programmed therein binary coded first order function signal corresponding to discrete amplitude increments within any group of amplitudes of said encoder means output signal for providing a first order output signal; group detector means operatively connected to receive said fixed increment counter means output signal, having programmed therein predetermined second order functions corresponding to discrete groups of amplitudes, for providing an output signal indicative of preselected amplitude groups; logic means connected to receive the output signals from said fixed increment counter means and said memory means for providing a binary coded output signal indicative of predetermined combinations thereof; variable increment counter means connected to receive said logic means output signal for sequentially accumulating said output signal; comparator means connected to receive said fixed increment counter means and said encoder means output signals for providing an output signal indicative of a match therebetween; and readout means connected to receive said variable increment counter means output signal and said comparator means output signal for providing a readout signal upon receipt thereof.

Claim 10

A digital function generator for producing a predetermined digital function signal on receiving a continuous input signal, comprising, in combination: encoder means fOr converting the continuous input signal into a binary coded signal; fixed increment counter means for cyclically producing between a minimum and maximum amplitude a binary coded output signal sequentially incremented in equal least significant bits; memory means connected to receive said fixed increment counter means output signal, having programmed therein binary coded first order function signal corresponding to discrete amplitude increments within any group of amplitudes of said encoder means output signal for providing a first order output signal; group detector means operatively connected to receive said fixed increment counter means output signal, having programmed therein predetermined second order functions corresponding to discrete groups of amplitudes, for providing an output signal indicative of preselected amplitude groups; logic means connected to receive the output signals from said fixed increment counter means and said memory means for providing a binary coded output signal indicative of predetermined combinations thereof; variable increment counter means connected to receive said logic means output signal for sequentially accumulating said output signal; comparator means connected to receive said fixed increment counter means and said encoder means output signals for providing an output signal indicative of a match therebetween; and readout means connected to receive said variable increment counter means output signal and said comparator means output signal for providing a readout signal upon receipt thereof.