Claims Analysis
Total Claims: 13
Claim 1
Independent Claim
144 words
In a radar signature recognizer which includes: a delay line having a plurality of output taps; a summing network having an output terminal; a plurality of controlled weights, one associated with each said output tap, each said controlled weight being connected between its associated output tap and said summing network; an improvement consisting of means for adjusting said controlled weights comprising: first means for storing in predetermined order the desired value of each of said controlled weight; second means for propagating a standardized amplitude signal through said delay line; third means for activating said controlled weights in a predetermined sequence, one at a time; fourth means comparing the resultant signals at said summing network output terminal with the desired value of the activated controlled weight for generating an error signal; and, fifth means responsive to said error signal for adjusting the activated controlled weight.
Claim 2
Dependent Claim
144 words
In a radar signature recognizer which includes: a delay line having a plurality of output taps; a summing network having an output terminal; a plurality of controlled weights, one associated with each said output tap, each said controlled weight being connected between its associated output tap and said summing network; an improvement consisting of means for adjusting said controlled weights comprising: first means for storing in predetermined order the desired value of each of said controlled weight; second means for propagating a standardized amplitude signal through said delay line; third means for activating said controlled weights in a predetermined sequence, one at a time; fourth means comparing the resultant signals at said summing network output terminal with the desired value of the activated controlled weight for generating an error signal; and, fifth means responsive to said error signal for adjusting the activated controlled weight.
Claim 3
Dependent Claim
28 words
The improvement of claim 1 wherein said fourth means includes clock means for synchronizing the operation of said fourth means with said first, second, third and fifth means.
Claim 4
Dependent Claim
60 words
The improvement of claim 2 wherein said first means comprises shift register means for storing in digital form information related to the desired value of each said controlled weight, said shift register means being responsive to said clock means for strobing said desired values from said shift register means in said predetermined order synchronously with operation of said third means.
Claim 5
Dependent Claim
44 words
The improvement of claim 3 with additionally a plurality of means responsive to information strobed from said shift register means for inverting or non-inverting a signal passing therethrough, one of said latter means being connected between each said controlled weight and said summing network.
Claim 6
Dependent Claim
18 words
The improvement of claim 1 wherein said plurality of controlled weights comprise a plurality of adjustable electrical resistances.
Claim 7
Dependent Claim
74 words
The improvement of claim 1 wherein each of said plurality of controlled weights comprises: a field effect transistor having a source-drain circuit connected between the controlled weight associated delay line output tap and said summing network, and a gate electrode; a capacitor having a first plate connected to said gate electrode and a second plate; and switching means responsive to said third means for selectively applying first and second voltages on said second plate.
Claim 8
Dependent Claim
186 words
In a radar signature recognizer which includes: means for delaying a signal propagated therethrough including a plurality of time spaced output taps; means for summing electrical signals applied thereto and including an output terminal upon which first signals related to the sum of said electrical signals is generated; and a plurality of adjustable resistance means, one associated with each said output tap, connected between its associated output tap and said means for summing; an improvement consisting of means for adjusting said resistance means comprising: a source of clock pulses; first means for propagating an amplitude standardized signal through said means for delaying; second means responsive to said clock pulses for generating in predetermined order information related to the desired value of each said resistance means; third means responsive to said clock pulses for activating said resistance means in a predetermined sequence one at a time synchronously with the generation of information related to the desired value of the activated resistance means; and, fourth means comparing said first signals with said information for generating an error signal, the activated resistance means being responsive to said error signal.
Claim 9
Dependent Claim
186 words
In a radar signature recognizer which includes: means for delaying a signal propagated therethrough including a plurality of time spaced output taps; means for summing electrical signals applied thereto and including an output terminal upon which first signals related to the sum of said electrical signals is generated; and a plurality of adjustable resistance means, one associated with each said output tap, connected between its associated output tap and said means for summing; an improvement consisting of means for adjusting said resistance means comprising: a source of clock pulses; first means for propagating an amplitude standardized signal through said means for delaying; second means responsive to said clock pulses for generating in predetermined order information related to the desired value of each said resistance means; third means responsive to said clock pulses for activating said resistance means in a predetermined sequence one at a time synchronously with the generation of information related to the desired value of the activated resistance means; and, fourth means comparing said first signals with said information for generating an error signal, the activated resistance means being responsive to said error signal.
Claim 10
Dependent Claim
46 words
The improvement of claim 7 wherein said second means comprises a shift register means for storing in binary format the desired value of each said resistance means, said shift register means being responsive to said clock pulses for generating said desired values in said predetermined order.
Claim 11
Dependent Claim
77 words
The improvement of claim 7 wherein each said resistance means includes: a field effect transistor having a source-drain circuit connected between its associated output tap and said means for summing, and a gate electrode; a capacitor having a first plate connected to said gate electrode and a second plate; switching means for selectively applying first and second voltages to said second plate; and, means responsive to said error signal for adjusting the voltage stored across said capacitor.
Claim 12
Dependent Claim
43 words
The improvement recited in claim 7 wherein said means for adjusting comprises: means responsive to said clock pulses for discharging the capacitors of all said resistance means; and, means responsive to said error signal for subsequently increasing the voltage stored across said capacitor.
Claim 13
Dependent Claim
52 words
The improvement of claim 7 wherein each said resistance means includes: an adjustable resistance having one end connected to its associated output tap and a second end; and an inverting and non-inverting amplifier responsive to said information, said amplifier being connected between said adjustable resistance second end and said means for summing.