Arrangement for the detection of faults in electronic circuits

Claim 1

An arrangement for searching for errors in electronic circuits comprising: a circulating memory connected to a circuit to be checked for storing output signals of the circuit, a gate circuit connected to the circuit to be checked for detecting an error in its output signals and responsive to generate a writestop signal, means interposed between the circulating memory and the circuit to be checked and connected to said gate circuit for inhibiting storage in the circulating memory in response to a write-stop signal, and means connected to said circulating memory for indicating the data content thereof, said circulating memory comprising a plurality of storage units corresponding to the number of signals to be recorded, said storage units including a transit-time member, an OR-circuit including a plurality of inputs and an output, a first amplifier connected to the output of said OR-circuit and to a transit-time member of a storage unit, a first AND-circuit having an output connected to one of said inputs of said OR-circuit and having a plurality of inputs, a second amplifier having an input connected to said transit-time member and an output connected to one of the inputs of said first AND-circuit, a second AND-circuit having a first input for receiving a signal to be recorded, a second input for receiving a timing pulse signal, and an output connected to another input of said OR-circuit, a bistable circuit having a first output connected to a second input of said first AND-circuit and a second output connected with a third input of said second ANDcircuit, said bistable circuit having a setting input for receiving the write-stop signals.