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US3723769A Expired / Lapsed US ⏱️ 0.0 years remaining

Solid state relay circuit with optical isolation and zero-cross firing

Assignee: SILICON POWER CUBE Corp
•
Filing: 1971-11-01
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Granted: 1973-03-27
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Expires: 1991-11-01
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Abstract

Abstract A solid state relay circuit is provided which has four terminals, two for power input, and two for signal input. The circuit consists of a full-wave diode bridge circuit having a pilot thyristor connected across its D.C. terminals. A firing control circuit also energized from these bridge terminals applies a firing signal to the thyristor gate responsive to the receipt of an input radiation signal from an optically isolated signal circuit connected to the signal input terminals, and causes the delivery of a firing signal to a thyristor or triac when the input voltage is near or at zero. Thus, the thyristor or triac in the relay output circuit begins to conduct under zero voltage conditions.

Inventors

  • 👤 H Collins

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-24 19:33
CPC Classifications
H; H03; H03K; H03K17/00; H03K17/51; H03K17/78; H03K17/79; H02; H02M; H02M1/00; H02M1/08; H02M1/083; H03K17/13; H03K17/136; H03K17/795; H03K17/7955

Claims Analysis

Total Claims: 9
Claim 1
Independent Claim 313 words
A solid state relay circuit comprising, in combination: a pair of power terminals connectable in series with a load and in series with an A.C. source of power; controllably conductive semiconductor means having a pair of main electrodes and a control electrode; said pair of main electrodes connected to said pair of power terminals, respectively; a single phase, full-wave bridge circuit having A.C. terminals and D.C. terminals; said pair of power terminals connected to said A.C. terminals; impedance means connected in at least one of the arms of said bridge circuit; a pilot controllably conductive device having a pair of main terminals and a control terminal; said pair of main terminals of said pilot controllably conductive device being connected to said D.C. terminals, respectively, of said bridge circuit; coupling circuit means for coupling a signal at said impedance means to said control electrode of said controllably conductive means, whereby said controllably conductive means becomes conductive in response to the conduction of said pilot controllably conductive device which affects the signal at said impedance means; a control circuit having output means connected to said control terminal of said pilot controllably conductive device; said control circuit being connected to and deriving energy from said D.C. terminals of said bridge circuit; said control circuit further including optically responsive circuit means, whereby incident radiation upon said optically responsive circuit means produces an output signal in said output means for causing said pilot controllably conductive device to conduct; optical generator means optically coupled to said control circuit; said optical generator means having first and second output terminals for receiving input signals for the operation of said relay circuit; and zero-crOss firing circuit means coupled between said D.C. terminals and said pilot controllably conductive device for allowing conduction of said pilot controllably conductive device only at a time of approximately zero instantaneous voltage between said pair of power terminals.
Claim 2
Dependent Claim 313 words
A solid state relay circuit comprising, in combination: a pair of power terminals connectable in series with a load and in series with an A.C. source of power; controllably conductive semiconductor means having a pair of main electrodes and a control electrode; said pair of main electrodes connected to said pair of power terminals, respectively; a single phase, full-wave bridge circuit having A.C. terminals and D.C. terminals; said pair of power terminals connected to said A.C. terminals; impedance means connected in at least one of the arms of said bridge circuit; a pilot controllably conductive device having a pair of main terminals and a control terminal; said pair of main terminals of said pilot controllably conductive device being connected to said D.C. terminals, respectively, of said bridge circuit; coupling circuit means for coupling a signal at said impedance means to said control electrode of said controllably conductive means, whereby said controllably conductive means becomes conductive in response to the conduction of said pilot controllably conductive device which affects the signal at said impedance means; a control circuit having output means connected to said control terminal of said pilot controllably conductive device; said control circuit being connected to and deriving energy from said D.C. terminals of said bridge circuit; said control circuit further including optically responsive circuit means, whereby incident radiation upon said optically responsive circuit means produces an output signal in said output means for causing said pilot controllably conductive device to conduct; optical generator means optically coupled to said control circuit; said optical generator means having first and second output terminals for receiving input signals for the operation of said relay circuit; and zero-crOss firing circuit means coupled between said D.C. terminals and said pilot controllably conductive device for allowing conduction of said pilot controllably conductive device only at a time of approximately zero instantaneous voltage between said pair of power terminals.
Claim 3
Dependent Claim 15 words
The relay circuit of claim 1 wherein said pilot controllably conductive device is a thyristor.
Claim 4
Dependent Claim 20 words
The relay circuit of claim 2 wherein said controllably conductive semiconductor means consists of a pair of inversely connected thyristors.
Claim 5
Dependent Claim 16 words
The relay circuit of claim 2 wherein said controllably conductive semiconductor means consists of a triac.
Claim 6
Dependent Claim 142 words
The relay circuit of claim 1 wherein said control circuit includes first, second and third parallel circuit connected between said D.C. terminals; said first circuit including a first parallel-connected combination of a resistor and capacitor connected in series with an optically sensitive impedance means which defines said optically responsive circuit means; said second circuit including a second parallel-connected combination of a resistor and capacitor connected in series with the collector-emitter of a first transistor; said third circuit comprising a resistor divider, and a second transistor; the collector-emitter circuit of said second transistor connected between said control electrode of said pilot controllably conductive device and one of said D.C. terminals; said optically sensitive impedance means connected between the base and emitter electrodes of said first transistor; said collector of said first transistor connected to said control electrode of said pilot controllably conductive device.
Claim 7
Dependent Claim 16 words
The relay circuit of claim 5 wherein said optically sensitive impedance means consists of a phototransistor.
Claim 8
Dependent Claim 196 words
A zero-cross firing circuit for firing a controllably conductive device only at about zero instantaneous voltage across said device; said firing circuit including rectifier circuit means connected in series with said controllably conductive device, said rectifier circuit having D.C. output terminals, and control circuit means connected across said D.C. output terminals; said controllably conductive device having a control electrode; said control circuit means being coupled to said control electrode of said device and including first, second and third parallel circuits connected between said D.C. terminals; said first circuit including a first parallel-connected combination of a resistor and capacitor connected in series with an optically sensitive impedance means; said second circuit including a second parallel-connected combination of a resistor and capacitor connected in series with the collector-emitter of a first transistor; said third circuit comprising a resistor divider, and a second transistor; the collector-emitter circuit of said second transistor connected between said control electrode of said controllably conductive device and one of said D.C. terminals; said optically sensitive impedance means connected between the base and emitter electrodes of said first transistor; said collector of said first transistor connected to said control electrode of said controllably conductive device.
Claim 9
Dependent Claim 196 words
A zero-cross firing circuit for firing a controllably conductive device only at about zero instantaneous voltage across said device; said firing circuit including rectifier circuit means connected in series with said controllably conductive device, said rectifier circuit having D.C. output terminals, and control circuit means connected across said D.C. output terminals; said controllably conductive device having a control electrode; said control circuit means being coupled to said control electrode of said device and including first, second and third parallel circuits connected between said D.C. terminals; said first circuit including a first parallel-connected combination of a resistor and capacitor connected in series with an optically sensitive impedance means; said second circuit including a second parallel-connected combination of a resistor and capacitor connected in series with the collector-emitter of a first transistor; said third circuit comprising a resistor divider, and a second transistor; the collector-emitter circuit of said second transistor connected between said control electrode of said controllably conductive device and one of said D.C. terminals; said optically sensitive impedance means connected between the base and emitter electrodes of said first transistor; said collector of said first transistor connected to said control electrode of said controllably conductive device.

References Cited (Backward Citations)

US3328606A Cited
US3524997A Cited
US3590275A Cited
US3649849A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1976-03-26 1976-09-25 1977-03-27 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1980-03-26 1980-09-25 1981-03-27 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1984-03-26 1984-09-25 1985-03-27 $7700.00 Window Closed / Lapsed

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