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US3721975A
Expired / Lapsed
US
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High speed analog-to-digital converter
Assignee: Singer Co
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Filing: 1971-10-07
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Granted: 1973-03-20
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Expires: 1991-10-07
Abstract
Abstract An analog-to-digital converter is provided which is capable of high speed operation in the nanosecond range. The analog input is introduced to an N-bit analog/digital converter; and the resulting digital output is passed to a digital/analog converter, the output of which appears across a current summing resistor stage. The aforesaid components make up a universal stage which can be cascaded with other similar stages through appropriate scaling amplifiers to provide a high resolution high speed analog-to-digital converter. The aforesaid universal stage uses a ''''thermometer'''' code in its analog/digital and digital/analog converters, such that each leg of the digital/analog converter has a weight of one count only. This is in contradistinction to the binary code in which each higher order bit has a weight of twice the number of counts, as compared with the previous bit. The use of the ''''thermometer'''' code allows the scaling amplifier to settle faster than it would if a binary code were used, since it is not subjected to large transient voltages which tend to drive the amplifier to saturation and beyond its cut off point.
Inventors
- 👤 R Prill
- 👤 J Brinkman
- 👤 R Paradise
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-02 14:24
CPC Classifications
H; H03; H03M; H03M1/00; H03M1/10; H03M1/1071; H03M1/12; H03M1/34; H03M1/36; H03M1/361; H03M1/38; H03M1/46; H03M1/66; H03M1/74
Claims Analysis
Total Claims: 7
Claim 1
Independent Claim
257 words
An analog-to-digital converter system including: an input circuit for developing an analog input signal; a first N-bit parallel analog/digital converter circuit having an input connected to said input circuit for digitizing said analog input signal in accordance with a thermometer code; a first N-bit thermometer digital/analog converter circuit having an input connected to the output of said analog/digital converter circuit; an output circuit; thermometer-binary decode logic circuitry interposed between the output of said first analog/digital converter circuit and said output circuit; a summing resistor connected to said input circuit and to the output of said first digital/analog converter circuit and serving to subtract from said analog input signal an analog signal proportional to the digitized output of said first analog/digital converter circuit; a scaling amplifier connected to said summing resistor for multiplying the difference between the analog input signal and said proportional analog signal by a predetermined factor; a second N-bit parallel thermometer analog/digital converter circuit having an input connected to said summing resistor for digitizing said difference signal; a second N-bit thermometer digital/analog converter circuit having an input connected to the output of said second analog/digital converter circuit; further thermometer decode logic circuitry intercoupling the output of said second N-bit parallel analog/digital converter to said output circuit; and a further summing resistor connected to the output of said amplifier and to the output of said second digital/analog converter, to cause said second summing resistor to subtract a discrete voltage, proportional to the encoded output of said second analog/digital converter, from the output of said scaling amplifier.
Claim 2
Dependent Claim
257 words
An analog-to-digital converter system including: an input circuit for developing an analog input signal; a first N-bit parallel analog/digital converter circuit having an input connected to said input circuit for digitizing said analog input signal in accordance with a thermometer code; a first N-bit thermometer digital/analog converter circuit having an input connected to the output of said analog/digital converter circuit; an output circuit; thermometer-binary decode logic circuitry interposed between the output of said first analog/digital converter circuit and said output circuit; a summing resistor connected to said input circuit and to the output of said first digital/analog converter circuit and serving to subtract from said analog input signal an analog signal proportional to the digitized output of said first analog/digital converter circuit; a scaling amplifier connected to said summing resistor for multiplying the difference between the analog input signal and said proportional analog signal by a predetermined factor; a second N-bit parallel thermometer analog/digital converter circuit having an input connected to said summing resistor for digitizing said difference signal; a second N-bit thermometer digital/analog converter circuit having an input connected to the output of said second analog/digital converter circuit; further thermometer decode logic circuitry intercoupling the output of said second N-bit parallel analog/digital converter to said output circuit; and a further summing resistor connected to the output of said amplifier and to the output of said second digital/analog converter, to cause said second summing resistor to subtract a discrete voltage, proportional to the encoded output of said second analog/digital converter, from the output of said scaling amplifier.
Claim 3
Dependent Claim
65 words
The analog-to-digital converter system defined in claim 1, in which said analog/digital converter circuit includes a plurality of comparators for digitizing said analog input signal, and in which said digital/analog converter circuit includes a plurality of current switches, the outputs of said comparators supplying digital output signals to said decode logic circuitry, and simultaneously driving corresponding ones of said current switches in said digital/analog circuit.
Claim 4
Dependent Claim
22 words
The analog/digital converter system defined in claim 2, in which the outputs of said current switches are applied to said summing resistor.
Claim 5
Dependent Claim
47 words
The analog/digital converter system defined in claim 1, and which includes a third N-bit parallel thermometer analog/digital converter circuit having an input connected to said second summing resistor; and further thermometer decode logic circuitry intercoupling the output of said third analog/digital converter circuit to said output circuit.
Claim 6
Dependent Claim
39 words
The analog/digital converter system defined in claim 4, in which said first, second and third analog/digital converter circuits havE the same circuit composition, and in which said first and second thermometer digital/analog converter circuits have the same circuit configuration.
Claim 7
Dependent Claim
25 words
The system defined in claim 1, in which said output circuit includes a counter register, and an output data register coupled to said counter register.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1976-03-19 | 1976-09-18 | 1977-03-20 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1980-03-19 | 1980-09-18 | 1981-03-20 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1984-03-19 | 1984-09-18 | 1985-03-20 | $7700.00 | Window Closed / Lapsed |